/* ELF support for BFD.
- Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 1991-2015 Free Software Foundation, Inc.
Written by Fred Fish @ Cygnus Support, from information published
in "UNIX System V Release 4, Programmers Guide: ANSI C and
#define EM_MN10300 89 /* Matsushita MN10300 */
#define EM_MN10200 90 /* Matsushita MN10200 */
#define EM_PJ 91 /* picoJava */
-#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */
+#define EM_OR1K 92 /* OpenRISC 1000 32-bit embedded processor */
#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */
#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */
#define EM_VIDEOCORE 95 /* Alphamosaic VideoCore processor */
#define EM_MANIK 171 /* M2000 Reconfigurable RISC Microprocessor */
#define EM_CRAYNV2 172 /* Cray Inc. NV2 vector architecture */
#define EM_RX 173 /* Renesas RX family */
-#define EM_METAG 174 /* Imagination Technologies META processor architecture */
+#define EM_METAG 174 /* Imagination Technologies Meta processor architecture */
#define EM_MCST_ELBRUS 175 /* MCST Elbrus general purpose hardware architecture */
#define EM_ECOG16 176 /* Cyan Technology eCOG16 family */
#define EM_CR16 177 /* National Semiconductor CompactRISC 16-bit processor */
#define EM_L1OM 180 /* Intel L1OM */
#define EM_K1OM 181 /* Intel K1OM */
#define EM_INTEL182 182 /* Reserved by Intel */
-#define EM_res183 183 /* Reserved by ARM */
-#define EM_res184 184 /* Reserved by ARM */
+#define EM_AARCH64 183 /* ARM 64-bit architecture */
+#define EM_ARM184 184 /* Reserved by ARM */
#define EM_AVR32 185 /* Atmel Corporation 32-bit microprocessor family */
#define EM_STM8 186 /* STMicroeletronics STM8 8-bit microcontroller */
#define EM_TILE64 187 /* Tilera TILE64 multicore architecture family */
#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */
#define EM_CUDA 190 /* NVIDIA CUDA architecture */
#define EM_TILEGX 191 /* Tilera TILE-Gx multicore architecture family */
+#define EM_RL78 197 /* Renesas RL78 family. */
+#define EM_78K0R 199 /* Renesas 78K0R. */
+#define EM_INTEL205 205 /* Reserved by Intel */
+#define EM_INTEL206 206 /* Reserved by Intel */
+#define EM_INTEL207 207 /* Reserved by Intel */
+#define EM_INTEL208 208 /* Reserved by Intel */
+#define EM_INTEL209 209 /* Reserved by Intel */
+#define EM_VISIUM 221 /* Controls and Data Services VISIUMcore processor */
+#define EM_MOXIE 223 /* Moxie processor family */
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
/* FR30 magic number - no EABI available. */
#define EM_CYGNUS_FR30 0x3330
-/* OpenRISC magic number. Written in the absense of an ABI. */
-#define EM_OPENRISC_OLD 0x3426
-
/* DLX magic number. Written in the absense of an ABI. */
#define EM_DLX 0x5aa5
/* Ubicom IP2xxx; Written in the absense of an ABI. */
#define EM_IP2K_OLD 0x8217
-/* (Deprecated) Temporary number for the OpenRISC processor. */
-#define EM_OR32 0x8472
-
/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
#define EM_CYGNUS_POWERPC 0x9025
#define EM_CYGNUS_MEP 0xF00D /* Toshiba MeP */
-#define EM_MOXIE 0xFEED /* Moxie */
+/* Old, unofficial value for Moxie. */
+#define EM_MOXIE_OLD 0xFEED
/* Old Sunplus S+core7 backend magic number. Written in the absence of an ABI. */
#define EM_SCORE_OLD 95
#define EM_MICROBLAZE_OLD 0xbaab /* Old MicroBlaze */
+#define EM_ADAPTEVA_EPIPHANY 0x1223 /* Adapteva's Epiphany architecture. */
+
+/* Old constant that might be in use by some software. */
+#define EM_OPENRISC EM_OR1K
+
/* See the above comment before you add a new EM_* value here. */
/* Values for e_version. */
/* note name must be "LINUX". */
#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
/* note name must be "LINUX". */
+#define NT_386_TLS 0x200 /* x86 TLS information */
+ /* note name must be "LINUX". */
+#define NT_386_IOPERM 0x201 /* x86 io permissions */
+ /* note name must be "LINUX". */
#define NT_X86_XSTATE 0x202 /* x86 XSAVE extended state */
/* note name must be "LINUX". */
#define NT_S390_HIGH_GPRS 0x300 /* S/390 upper halves of GPRs */
/* note name must be "LINUX". */
#define NT_S390_PREFIX 0x305 /* S390 prefix register */
/* note name must be "LINUX". */
+#define NT_S390_LAST_BREAK 0x306 /* S390 breaking event address */
+ /* note name must be "LINUX". */
+#define NT_S390_SYSTEM_CALL 0x307 /* S390 system call restart data */
+ /* note name must be "LINUX". */
+#define NT_S390_TDB 0x308 /* S390 transaction diagnostic block */
+ /* note name must be "LINUX". */
#define NT_ARM_VFP 0x400 /* ARM VFP registers */
+/* The following definitions should really use NT_AARCH_..., but defined
+ this way for compatibility with Linux. */
+#define NT_ARM_TLS 0x401 /* AArch TLS registers */
+ /* note name must be "LINUX". */
+#define NT_ARM_HW_BREAK 0x402 /* AArch hardware breakpoint registers */
+ /* note name must be "LINUX". */
+#define NT_ARM_HW_WATCH 0x403 /* AArch hardware watchpoint registers */
/* note name must be "LINUX". */
+#define NT_SIGINFO 0x53494749 /* Fields of siginfo_t. */
+#define NT_FILE 0x46494c45 /* Description of mapped files. */
/* Note segments for core files on dir-style procfs systems. */
#define DF_1_INTERPOSE 0x00000400
#define DF_1_NODEFLIB 0x00000800
#define DF_1_NODUMP 0x00001000
-#define DF_1_CONLFAT 0x00002000
+#define DF_1_CONFALT 0x00002000
+#define DF_1_ENDFILTEE 0x00004000
+#define DF_1_DISPRELDNE 0x00008000
+#define DF_1_DISPRELPND 0x00010000
+#define DF_1_NODIRECT 0x00020000
+#define DF_1_IGNMULDEF 0x00040000
+#define DF_1_NOKSYMS 0x00080000
+#define DF_1_NOHDR 0x00100000
+#define DF_1_EDITED 0x00200000
+#define DF_1_NORELOC 0x00400000
+#define DF_1_SYMINTPOSE 0x00800000
+#define DF_1_GLOBAUDIT 0x01000000
+#define DF_1_SINGLETON 0x02000000
/* Flag values for the DT_FLAGS entry. */
#define DF_ORIGIN (1 << 0)
#define AT_BASE_PLATFORM 24 /* String identifying real platform,
may differ from AT_PLATFORM. */
#define AT_RANDOM 25 /* Address of 16 random bytes. */
+#define AT_HWCAP2 26 /* Extension of AT_HWCAP. */
#define AT_EXECFN 31 /* Filename of executable. */
/* Pointer to the global system page used for system calls and other
nice things. */
#define AT_SYSINFO 32
#define AT_SYSINFO_EHDR 33 /* Pointer to ELF header of system-supplied DSO. */
+/* More complete cache descriptions than AT_[DIU]CACHEBSIZE. If the
+ value is -1, then the cache doesn't exist. Otherwise:
+
+ bit 0-3: Cache set-associativity; 0 means fully associative.
+ bit 4-7: Log2 of cacheline size.
+ bit 8-31: Size of the entire cache >> 8. */
+
+#define AT_L1I_CACHESHAPE 34
+#define AT_L1D_CACHESHAPE 35
+#define AT_L2_CACHESHAPE 36
+#define AT_L3_CACHESHAPE 37
+
#define AT_SUN_UID 2000 /* Effective user ID. */
#define AT_SUN_RUID 2001 /* Real user ID. */
#define AT_SUN_GID 2002 /* Effective group ID. */
projects / external / binutils.git / blobdiff