/* ELF support for BFD.
- Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
- Free Software Foundation, Inc.
+ Copyright (C) 1991-2015 Free Software Foundation, Inc.
Written by Fred Fish @ Cygnus Support, from information published
in "UNIX System V Release 4, Programmers Guide: ANSI C and
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
/* This file is part of ELF support for BFD, and contains the portions
that are common to both the internal and external representations.
#define ELFOSABI_NONE 0 /* UNIX System V ABI */
#define ELFOSABI_HPUX 1 /* HP-UX operating system */
#define ELFOSABI_NETBSD 2 /* NetBSD */
-#define ELFOSABI_LINUX 3 /* GNU/Linux */
-#define ELFOSABI_HURD 4 /* GNU/Hurd */
+#define ELFOSABI_GNU 3 /* GNU */
+#define ELFOSABI_LINUX 3 /* Alias for ELFOSABI_GNU */
#define ELFOSABI_SOLARIS 6 /* Solaris */
#define ELFOSABI_AIX 7 /* AIX */
#define ELFOSABI_IRIX 8 /* IRIX */
#define ELFOSABI_OPENVMS 13 /* OpenVMS */
#define ELFOSABI_NSK 14 /* Hewlett-Packard Non-Stop Kernel */
#define ELFOSABI_AROS 15 /* AROS */
+#define ELFOSABI_FENIXOS 16 /* FenixOS */
+#define ELFOSABI_C6000_ELFABI 64 /* Bare-metal TMS320C6000 */
+#define ELFOSABI_C6000_LINUX 65 /* Linux TMS320C6000 */
#define ELFOSABI_ARM 97 /* ARM */
#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
#define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */
#define EM_S370 9 /* IBM System/370 */
#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian (Oct 4 1999 Draft) Deprecated */
-
+#define EM_res011 11 /* Reserved */
+#define EM_res012 12 /* Reserved */
+#define EM_res013 13 /* Reserved */
+#define EM_res014 14 /* Reserved */
#define EM_PARISC 15 /* HPPA */
-
+#define EM_res016 16 /* Reserved */
#define EM_VPP550 17 /* Fujitsu VPP500 */
#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
#define EM_960 19 /* Intel 80960 */
#define EM_PPC64 21 /* 64-bit PowerPC */
#define EM_S390 22 /* IBM S/390 */
#define EM_SPU 23 /* Sony/Toshiba/IBM SPU */
-
+#define EM_res024 24 /* Reserved */
+#define EM_res025 25 /* Reserved */
+#define EM_res026 26 /* Reserved */
+#define EM_res027 27 /* Reserved */
+#define EM_res028 28 /* Reserved */
+#define EM_res029 29 /* Reserved */
+#define EM_res030 30 /* Reserved */
+#define EM_res031 31 /* Reserved */
+#define EM_res032 32 /* Reserved */
+#define EM_res033 33 /* Reserved */
+#define EM_res034 34 /* Reserved */
+#define EM_res035 35 /* Reserved */
#define EM_V800 36 /* NEC V800 series */
#define EM_FR20 37 /* Fujitsu FR20 */
#define EM_RH32 38 /* TRW RH32 */
#define EM_MMA 54 /* Fujitsu Multimedia Accelerator */
#define EM_PCP 55 /* Siemens PCP */
#define EM_NCPU 56 /* Sony nCPU embedded RISC processor */
-#define EM_NDR1 57 /* Denso NDR1 microprocesspr */
+#define EM_NDR1 57 /* Denso NDR1 microprocessor */
#define EM_STARCORE 58 /* Motorola Star*Core processor */
#define EM_ME16 59 /* Toyota ME16 processor */
#define EM_ST100 60 /* STMicroelectronics ST100 processor */
#define EM_FR30 84 /* Fujitsu FR30 */
#define EM_D10V 85 /* Mitsubishi D10V */
#define EM_D30V 86 /* Mitsubishi D30V */
-#define EM_V850 87 /* NEC v850 */
+#define EM_V850 87 /* Renesas V850 (formerly NEC V850) */
#define EM_M32R 88 /* Renesas M32R (formerly Mitsubishi M32R) */
#define EM_MN10300 89 /* Matsushita MN10300 */
#define EM_MN10200 90 /* Matsushita MN10200 */
#define EM_PJ 91 /* picoJava */
-#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */
+#define EM_OR1K 92 /* OpenRISC 1000 32-bit embedded processor */
#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */
#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */
#define EM_VIDEOCORE 95 /* Alphamosaic VideoCore processor */
#define EM_DSPIC30F 118 /* Microchip Technology dsPIC30F Digital Signal Controller */
#define EM_CE 119 /* Freescale Communication Engine RISC core */
#define EM_M32C 120 /* Renesas M32C series microprocessors */
-
+#define EM_res121 121 /* Reserved */
+#define EM_res122 122 /* Reserved */
+#define EM_res123 123 /* Reserved */
+#define EM_res124 124 /* Reserved */
+#define EM_res125 125 /* Reserved */
+#define EM_res126 126 /* Reserved */
+#define EM_res127 127 /* Reserved */
+#define EM_res128 128 /* Reserved */
+#define EM_res129 129 /* Reserved */
+#define EM_res130 130 /* Reserved */
#define EM_TSK3000 131 /* Altium TSK3000 core */
#define EM_RS08 132 /* Freescale RS08 embedded processor */
-
+#define EM_res133 133 /* Reserved */
#define EM_ECOG2 134 /* Cyan Technology eCOG2 microprocessor */
#define EM_SCORE 135 /* Sunplus Score */
+#define EM_SCORE7 135 /* Sunplus S+core7 RISC processor */
#define EM_DSP24 136 /* New Japan Radio (NJR) 24-bit DSP Processor */
#define EM_VIDEOCORE3 137 /* Broadcom VideoCore III processor */
#define EM_LATTICEMICO32 138 /* RISC processor for Lattice FPGA architecture */
#define EM_SE_C17 139 /* Seiko Epson C17 family */
-
+#define EM_TI_C6000 140 /* Texas Instruments TMS320C6000 DSP family */
+#define EM_TI_C2000 141 /* Texas Instruments TMS320C2000 DSP family */
+#define EM_TI_C5500 142 /* Texas Instruments TMS320C55x DSP family */
+#define EM_res143 143 /* Reserved */
+#define EM_res144 144 /* Reserved */
+#define EM_res145 145 /* Reserved */
+#define EM_res146 146 /* Reserved */
+#define EM_res147 147 /* Reserved */
+#define EM_res148 148 /* Reserved */
+#define EM_res149 149 /* Reserved */
+#define EM_res150 150 /* Reserved */
+#define EM_res151 151 /* Reserved */
+#define EM_res152 152 /* Reserved */
+#define EM_res153 153 /* Reserved */
+#define EM_res154 154 /* Reserved */
+#define EM_res155 155 /* Reserved */
+#define EM_res156 156 /* Reserved */
+#define EM_res157 157 /* Reserved */
+#define EM_res158 158 /* Reserved */
+#define EM_res159 159 /* Reserved */
#define EM_MMDSP_PLUS 160 /* STMicroelectronics 64bit VLIW Data Signal Processor */
#define EM_CYPRESS_M8C 161 /* Cypress M8C microprocessor */
#define EM_R32C 162 /* Renesas R32C series microprocessors */
#define EM_MANIK 171 /* M2000 Reconfigurable RISC Microprocessor */
#define EM_CRAYNV2 172 /* Cray Inc. NV2 vector architecture */
#define EM_RX 173 /* Renesas RX family */
-#define EM_METAG 174 /* Imagination Technologies META processor architecture */
+#define EM_METAG 174 /* Imagination Technologies Meta processor architecture */
#define EM_MCST_ELBRUS 175 /* MCST Elbrus general purpose hardware architecture */
#define EM_ECOG16 176 /* Cyan Technology eCOG16 family */
#define EM_CR16 177 /* National Semiconductor CompactRISC 16-bit processor */
+#define EM_ETPU 178 /* Freescale Extended Time Processing Unit */
+#define EM_SLE9X 179 /* Infineon Technologies SLE9X core */
+#define EM_L1OM 180 /* Intel L1OM */
+#define EM_K1OM 181 /* Intel K1OM */
+#define EM_INTEL182 182 /* Reserved by Intel */
+#define EM_AARCH64 183 /* ARM 64-bit architecture */
+#define EM_ARM184 184 /* Reserved by ARM */
+#define EM_AVR32 185 /* Atmel Corporation 32-bit microprocessor family */
+#define EM_STM8 186 /* STMicroeletronics STM8 8-bit microcontroller */
+#define EM_TILE64 187 /* Tilera TILE64 multicore architecture family */
+#define EM_TILEPRO 188 /* Tilera TILEPro multicore architecture family */
+#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */
+#define EM_CUDA 190 /* NVIDIA CUDA architecture */
+#define EM_TILEGX 191 /* Tilera TILE-Gx multicore architecture family */
+#define EM_RL78 197 /* Renesas RL78 family. */
+#define EM_78K0R 199 /* Renesas 78K0R. */
+#define EM_INTEL205 205 /* Reserved by Intel */
+#define EM_INTEL206 206 /* Reserved by Intel */
+#define EM_INTEL207 207 /* Reserved by Intel */
+#define EM_INTEL208 208 /* Reserved by Intel */
+#define EM_INTEL209 209 /* Reserved by Intel */
+#define EM_VISIUM 221 /* Controls and Data Services VISIUMcore processor */
+#define EM_MOXIE 223 /* Moxie processor family */
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
/* FR30 magic number - no EABI available. */
#define EM_CYGNUS_FR30 0x3330
-/* OpenRISC magic number. Written in the absense of an ABI. */
-#define EM_OPENRISC_OLD 0x3426
-
/* DLX magic number. Written in the absense of an ABI. */
#define EM_DLX 0x5aa5
/* Ubicom IP2xxx; Written in the absense of an ABI. */
#define EM_IP2K_OLD 0x8217
-/* (Deprecated) Temporary number for the OpenRISC processor. */
-#define EM_OR32 0x8472
-
/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
#define EM_CYGNUS_POWERPC 0x9025
#define EM_CYGNUS_MEP 0xF00D /* Toshiba MeP */
+/* Old, unofficial value for Moxie. */
+#define EM_MOXIE_OLD 0xFEED
+
+/* Old Sunplus S+core7 backend magic number. Written in the absence of an ABI. */
+#define EM_SCORE_OLD 95
+
+#define EM_MICROBLAZE_OLD 0xbaab /* Old MicroBlaze */
+
+#define EM_ADAPTEVA_EPIPHANY 0x1223 /* Adapteva's Epiphany architecture. */
+
+/* Old constant that might be in use by some software. */
+#define EM_OPENRISC EM_OR1K
+
/* See the above comment before you add a new EM_* value here. */
/* Values for e_version. */
#define EV_NONE 0 /* Invalid ELF version */
#define EV_CURRENT 1 /* Current version */
+/* Value for e_phnum. */
+#define PN_XNUM 0xffff /* Extended numbering */
+
/* Values for program header, p_type field. */
#define PT_NULL 0 /* Program header table entry unused */
#define SHT_LOOS 0x60000000 /* First of OS specific semantics */
#define SHT_HIOS 0x6fffffff /* Last of OS specific semantics */
+#define SHT_GNU_INCREMENTAL_INPUTS 0x6fff4700 /* incremental build data */
#define SHT_GNU_ATTRIBUTES 0x6ffffff5 /* Object attributes */
#define SHT_GNU_HASH 0x6ffffff6 /* GNU style symbol hash table */
#define SHT_GNU_LIBLIST 0x6ffffff7 /* List of prelink dependencies */
#define SHF_MASKOS 0x0FF00000 /* New value, Oct 4, 1999 Draft */
#define SHF_MASKPROC 0xF0000000 /* Processor-specific semantics */
+/* This used to be implemented as a processor specific section flag.
+ We just make it generic. */
+#define SHF_EXCLUDE 0x80000000 /* Link editor is to exclude
+ this section from executable
+ and shared library that it
+ builds when those objects
+ are not to be further
+ relocated. */
+
/* Values of note segment descriptor types for core files. */
#define NT_PRSTATUS 1 /* Contains copy of prstatus struct */
/* note name must be "LINUX". */
#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
/* note name must be "LINUX". */
+#define NT_386_TLS 0x200 /* x86 TLS information */
+ /* note name must be "LINUX". */
+#define NT_386_IOPERM 0x201 /* x86 io permissions */
+ /* note name must be "LINUX". */
+#define NT_X86_XSTATE 0x202 /* x86 XSAVE extended state */
+ /* note name must be "LINUX". */
+#define NT_S390_HIGH_GPRS 0x300 /* S/390 upper halves of GPRs */
+ /* note name must be "LINUX". */
+#define NT_S390_TIMER 0x301 /* S390 timer */
+ /* note name must be "LINUX". */
+#define NT_S390_TODCMP 0x302 /* S390 TOD clock comparator */
+ /* note name must be "LINUX". */
+#define NT_S390_TODPREG 0x303 /* S390 TOD programmable register */
+ /* note name must be "LINUX". */
+#define NT_S390_CTRS 0x304 /* S390 control registers */
+ /* note name must be "LINUX". */
+#define NT_S390_PREFIX 0x305 /* S390 prefix register */
+ /* note name must be "LINUX". */
+#define NT_S390_LAST_BREAK 0x306 /* S390 breaking event address */
+ /* note name must be "LINUX". */
+#define NT_S390_SYSTEM_CALL 0x307 /* S390 system call restart data */
+ /* note name must be "LINUX". */
+#define NT_S390_TDB 0x308 /* S390 transaction diagnostic block */
+ /* note name must be "LINUX". */
+#define NT_ARM_VFP 0x400 /* ARM VFP registers */
+/* The following definitions should really use NT_AARCH_..., but defined
+ this way for compatibility with Linux. */
+#define NT_ARM_TLS 0x401 /* AArch TLS registers */
+ /* note name must be "LINUX". */
+#define NT_ARM_HW_BREAK 0x402 /* AArch hardware breakpoint registers */
+ /* note name must be "LINUX". */
+#define NT_ARM_HW_WATCH 0x403 /* AArch hardware watchpoint registers */
+ /* note name must be "LINUX". */
+#define NT_SIGINFO 0x53494749 /* Fields of siginfo_t. */
+#define NT_FILE 0x46494c45 /* Description of mapped files. */
/* Note segments for core files on dir-style procfs systems. */
#define NT_LWPSINFO 17 /* Has a struct lwpsinfo_t */
#define NT_WIN32PSTATUS 18 /* Has a struct win32_pstatus */
+/* Note segment for SystemTap probes. */
+#define NT_STAPSDT 3
/* Note segments for core files on NetBSD systems. Note name
must start with "NetBSD-CORE". */
#define NT_NETBSDCORE_PROCINFO 1 /* Has a struct procinfo */
#define NT_NETBSDCORE_FIRSTMACH 32 /* start of machdep note types */
+
+/* Note segments for core files on OpenBSD systems. Note name is
+ "OpenBSD". */
+
+#define NT_OPENBSD_PROCINFO 10
+#define NT_OPENBSD_AUXV 11
+#define NT_OPENBSD_REGS 20
+#define NT_OPENBSD_FPREGS 21
+#define NT_OPENBSD_XFPREGS 22
+#define NT_OPENBSD_WCOOKIE 23
+
+
/* Note segments for core files on SPU systems. Note name
must start with "SPU/". */
#define STB_GLOBAL 1 /* Symbol visible outside obj */
#define STB_WEAK 2 /* Like globals, lower precedence */
#define STB_LOOS 10 /* OS-specific semantics */
+#define STB_GNU_UNIQUE 10 /* Symbol is unique in namespace */
#define STB_HIOS 12 /* OS-specific semantics */
-#define STB_LOPROC 13 /* Application-specific semantics */
-#define STB_HIPROC 15 /* Application-specific semantics */
+#define STB_LOPROC 13 /* Processor-specific semantics */
+#define STB_HIPROC 15 /* Processor-specific semantics */
#define STT_NOTYPE 0 /* Symbol type is unspecified */
#define STT_OBJECT 1 /* Symbol is a data object */
#define STT_RELC 8 /* Complex relocation expression */
#define STT_SRELC 9 /* Signed Complex relocation expression */
#define STT_LOOS 10 /* OS-specific semantics */
+#define STT_GNU_IFUNC 10 /* Symbol is an indirect code object */
#define STT_HIOS 12 /* OS-specific semantics */
-#define STT_LOPROC 13 /* Application-specific semantics */
-#define STT_HIPROC 15 /* Application-specific semantics */
+#define STT_LOPROC 13 /* Processor-specific semantics */
+#define STT_HIPROC 15 /* Processor-specific semantics */
/* The following constants control how a symbol may be accessed once it has
become part of an executable or shared library. */
#define DT_LOPROC 0x70000000
#define DT_HIPROC 0x7fffffff
-/* The next four dynamic tags are used on Solaris. We support them
- everywhere. Note these values lie outside of the (new) range for
- OS specific values. This is a deliberate special case and we
- maintain it for backwards compatability. */
+/* The next 2 dynamic tag ranges, integer value range (DT_VALRNGLO to
+ DT_VALRNGHI) and virtual address range (DT_ADDRRNGLO to DT_ADDRRNGHI),
+ are used on Solaris. We support them everywhere. Note these values
+ lie outside of the (new) range for OS specific values. This is a
+ deliberate special case and we maintain it for backwards compatability.
+ */
#define DT_VALRNGLO 0x6ffffd00
#define DT_GNU_PRELINKED 0x6ffffdf5
#define DT_GNU_CONFLICTSZ 0x6ffffdf6
#define DF_1_INTERPOSE 0x00000400
#define DF_1_NODEFLIB 0x00000800
#define DF_1_NODUMP 0x00001000
-#define DF_1_CONLFAT 0x00002000
+#define DF_1_CONFALT 0x00002000
+#define DF_1_ENDFILTEE 0x00004000
+#define DF_1_DISPRELDNE 0x00008000
+#define DF_1_DISPRELPND 0x00010000
+#define DF_1_NODIRECT 0x00020000
+#define DF_1_IGNMULDEF 0x00040000
+#define DF_1_NOKSYMS 0x00080000
+#define DF_1_NOHDR 0x00100000
+#define DF_1_EDITED 0x00200000
+#define DF_1_NORELOC 0x00400000
+#define DF_1_SYMINTPOSE 0x00800000
+#define DF_1_GLOBAUDIT 0x01000000
+#define DF_1_SINGLETON 0x02000000
/* Flag values for the DT_FLAGS entry. */
#define DF_ORIGIN (1 << 0)
#define VER_DEF_CURRENT 1
/* These constants appear in the vd_flags field of a Elf32_Verdef
- structure. */
+ structure.
+
+ Cf. the Solaris Linker and Libraries Guide, Ch. 7, Object File Format,
+ Versioning Sections, for a description:
+
+ http://docs.sun.com/app/docs/doc/819-0690/chapter6-93046?l=en&a=view */
#define VER_FLG_BASE 0x1
#define VER_FLG_WEAK 0x2
+#define VER_FLG_INFO 0x4
/* These special constants can be found in an Elf32_Versym field. */
#define AT_SECURE 23 /* Boolean, was exec setuid-like? */
#define AT_BASE_PLATFORM 24 /* String identifying real platform,
may differ from AT_PLATFORM. */
+#define AT_RANDOM 25 /* Address of 16 random bytes. */
+#define AT_HWCAP2 26 /* Extension of AT_HWCAP. */
#define AT_EXECFN 31 /* Filename of executable. */
/* Pointer to the global system page used for system calls and other
nice things. */
#define AT_SYSINFO 32
#define AT_SYSINFO_EHDR 33 /* Pointer to ELF header of system-supplied DSO. */
+/* More complete cache descriptions than AT_[DIU]CACHEBSIZE. If the
+ value is -1, then the cache doesn't exist. Otherwise:
+
+ bit 0-3: Cache set-associativity; 0 means fully associative.
+ bit 4-7: Log2 of cacheline size.
+ bit 8-31: Size of the entire cache >> 8. */
+
+#define AT_L1I_CACHESHAPE 34
+#define AT_L1D_CACHESHAPE 35
+#define AT_L2_CACHESHAPE 36
+#define AT_L3_CACHESHAPE 37
+
#define AT_SUN_UID 2000 /* Effective user ID. */
#define AT_SUN_RUID 2001 /* Real user ID. */
#define AT_SUN_GID 2002 /* Effective group ID. */