clk: Add rp1 clock driver

[platform/kernel/linux-rpi.git] / include / dt-bindings / clock / rp1.h

diff --git a/include/dt-bindings/clock/rp1.h b/include/dt-bindings/clock/rp1.h
index 5fc04d4..1305bf7 100644 (file)
--- a/include/dt-bindings/clock/rp1.h
+++ b/include/dt-bindings/clock/rp1.h
@@ -13,39 +13,40 @@
 
 #define RP1_PLL_SYS_PRI_PH             6
 #define RP1_PLL_SYS_SEC_PH             7
+#define RP1_PLL_AUDIO_PRI_PH           8
 
-#define RP1_PLL_SYS_SEC                        8
-#define RP1_PLL_AUDIO_SEC              9
-#define RP1_PLL_VIDEO_SEC              10
+#define RP1_PLL_SYS_SEC                        9
+#define RP1_PLL_AUDIO_SEC              10
+#define RP1_PLL_VIDEO_SEC              11
 
-#define RP1_CLK_SYS                    11
-#define RP1_CLK_SLOW_SYS               12
-#define RP1_CLK_DMA                    13
-#define RP1_CLK_UART                   14
-#define RP1_CLK_ETH                    15
-#define RP1_CLK_PWM0                   16
-#define RP1_CLK_PWM1                   17
-#define RP1_CLK_AUDIO_IN               18
-#define RP1_CLK_AUDIO_OUT              19
-#define RP1_CLK_I2S                    20
-#define RP1_CLK_MIPI0_CFG              21
-#define RP1_CLK_MIPI1_CFG              22
-#define RP1_CLK_PCIE_AUX               23
-#define RP1_CLK_USBH0_MICROFRAME       24
-#define RP1_CLK_USBH1_MICROFRAME       25
-#define RP1_CLK_USBH0_SUSPEND          26
-#define RP1_CLK_USBH1_SUSPEND          27
-#define RP1_CLK_ETH_TSU                        28
-#define RP1_CLK_ADC                    29
-#define RP1_CLK_SDIO_TIMER             30
-#define RP1_CLK_SDIO_ALT_SRC           31
-#define RP1_CLK_GP0                    32
-#define RP1_CLK_GP1                    33
-#define RP1_CLK_GP2                    34
-#define RP1_CLK_GP3                    35
-#define RP1_CLK_GP4                    36
-#define RP1_CLK_GP5                    37
-#define RP1_CLK_VEC                    38
-#define RP1_CLK_DPI                    39
-#define RP1_CLK_MIPI0_DPI              40
-#define RP1_CLK_MIPI1_DPI              41
+#define RP1_CLK_SYS                    12
+#define RP1_CLK_SLOW_SYS               13
+#define RP1_CLK_DMA                    14
+#define RP1_CLK_UART                   15
+#define RP1_CLK_ETH                    16
+#define RP1_CLK_PWM0                   17
+#define RP1_CLK_PWM1                   18
+#define RP1_CLK_AUDIO_IN               19
+#define RP1_CLK_AUDIO_OUT              20
+#define RP1_CLK_I2S                    21
+#define RP1_CLK_MIPI0_CFG              22
+#define RP1_CLK_MIPI1_CFG              23
+#define RP1_CLK_PCIE_AUX               24
+#define RP1_CLK_USBH0_MICROFRAME       25
+#define RP1_CLK_USBH1_MICROFRAME       26
+#define RP1_CLK_USBH0_SUSPEND          27
+#define RP1_CLK_USBH1_SUSPEND          28
+#define RP1_CLK_ETH_TSU                        29
+#define RP1_CLK_ADC                    30
+#define RP1_CLK_SDIO_TIMER             31
+#define RP1_CLK_SDIO_ALT_SRC           32
+#define RP1_CLK_GP0                    33
+#define RP1_CLK_GP1                    34
+#define RP1_CLK_GP2                    35
+#define RP1_CLK_GP3                    36
+#define RP1_CLK_GP4                    37
+#define RP1_CLK_GP5                    38
+#define RP1_CLK_VEC                    39
+#define RP1_CLK_DPI                    40
+#define RP1_CLK_MIPI0_DPI              41
+#define RP1_CLK_MIPI1_DPI              42