Merge tag 'topic/dp-hdmi-2.1-pcon-2020-12-23' of git://anongit.freedesktop.org/drm...

[platform/kernel/linux-starfive.git] / include / drm / drm_connector.h

diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index fcdc58d..1922b27 100644 (file)
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -175,6 +175,46 @@ struct drm_scdc {
        struct drm_scrambling scrambling;
 };
 
+/**
+ * struct drm_hdmi_dsc_cap - DSC capabilities of HDMI sink
+ *
+ * Describes the DSC support provided by HDMI 2.1 sink.
+ * The information is fetched fom additional HFVSDB blocks defined
+ * for HDMI 2.1.
+ */
+struct drm_hdmi_dsc_cap {
+       /** @v_1p2: flag for dsc1.2 version support by sink */
+       bool v_1p2;
+
+       /** @native_420: Does sink support DSC with 4:2:0 compression */
+       bool native_420;
+
+       /**
+        * @all_bpp: Does sink support all bpp with 4:4:4: or 4:2:2
+        * compressed formats
+        */
+       bool all_bpp;
+
+       /**
+        * @bpc_supported: compressed bpc supported by sink : 10, 12 or 16 bpc
+        */
+       u8 bpc_supported;
+
+       /** @max_slices: maximum number of Horizontal slices supported by */
+       u8 max_slices;
+
+       /** @clk_per_slice : max pixel clock in MHz supported per slice */
+       int clk_per_slice;
+
+       /** @max_lanes : dsc max lanes supported for Fixed rate Link training */
+       u8 max_lanes;
+
+       /** @max_frl_rate_per_lane : maximum frl rate with DSC per lane */
+       u8 max_frl_rate_per_lane;
+
+       /** @total_chunk_kbytes: max size of chunks in KBs supported per line*/
+       u8 total_chunk_kbytes;
+};
 
 /**
  * struct drm_hdmi_info - runtime information about the connected HDMI sink
@@ -207,6 +247,15 @@ struct drm_hdmi_info {
 
        /** @y420_dc_modes: bitmap of deep color support index */
        u8 y420_dc_modes;
+
+       /** @max_frl_rate_per_lane: support fixed rate link */
+       u8 max_frl_rate_per_lane;
+
+       /** @max_lanes: supported by sink */
+       u8 max_lanes;
+
+       /** @dsc_cap: DSC capabilities of the sink */
+       struct drm_hdmi_dsc_cap dsc_cap;
 };
 
 /**