Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'

[platform/kernel/u-boot.git] / include / configs / zynq-common.h

diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 09d6c55..690cacb 100644 (file)
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -188,7 +188,7 @@
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_CLOCKS
 #define CONFIG_CMD_CLK
-#define CONFIG_SYS_MAXARGS             15 /* max number of command args */
+#define CONFIG_SYS_MAXARGS             32 /* max number of command args */
 #define CONFIG_SYS_CBSIZE              256 /* Console I/O Buffer Size */
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
                                        sizeof(CONFIG_SYS_PROMPT) + 16)
@@ -214,6 +214,10 @@
 #define CONFIG_FPGA_XILINX
 #define CONFIG_FPGA_ZYNQPL
 #define CONFIG_CMD_FPGA
+#define CONFIG_CMD_FPGA_LOADMK
+#define CONFIG_CMD_FPGA_LOADP
+#define CONFIG_CMD_FPGA_LOADBP
+#define CONFIG_CMD_FPGA_LOADFS
 
 /* Open Firmware flat tree */
 #define CONFIG_OF_LIBFDT
@@ -221,6 +225,7 @@
 /* FIT support */
 #define CONFIG_FIT
 #define CONFIG_FIT_VERBOSE     1 /* enable fit_format_{error,warning}() */
+#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
 
 /* FDT support */
 #define CONFIG_OF_CONTROL
@@ -262,13 +267,6 @@
 
 #define CONFIG_SPL_LDSCRIPT    "arch/arm/cpu/armv7/zynq/u-boot-spl.lds"
 
-/* Disable dcache for SPL just for sure */
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_DCACHE_OFF
-#undef CONFIG_FPGA
-#undef CONFIG_OF_CONTROL
-#endif
-
 /* MMC support */
 #ifdef CONFIG_ZYNQ_SDHCI0
 #define CONFIG_SPL_MMC_SUPPORT
@@ -277,7 +275,18 @@
 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
 #define CONFIG_SPL_LIBDISK_SUPPORT
 #define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME     "u-boot.img"
+#if defined(CONFIG_OF_CONTROL) && defined(CONFIG_OF_SEPARATE)
+# define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME     "u-boot-dtb.img"
+#else
+# define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME     "u-boot.img"
+#endif
+#endif
+
+/* Disable dcache for SPL just for sure */
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_DCACHE_OFF
+#undef CONFIG_FPGA
+#undef CONFIG_OF_CONTROL
 #endif
 
 /* Address in RAM where the parameters must be copied by SPL. */
@@ -330,4 +339,6 @@
 
 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
 
+#define CONFIG_SYS_GENERIC_BOARD
+
 #endif /* __CONFIG_ZYNQ_COMMON_H */