+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
- * (C) Copyright 2013 Xilinx, Inc.
+ * (C) Copyright 2013 - 2018 Xilinx, Inc.
*
* Common configuration options for all Zynq boards.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_ZYNQ_COMMON_H
# define CONFIG_CPU_FREQ_HZ 800000000
#endif
+#define CONFIG_REMAKE_ELF
+
/* Cache options */
#define CONFIG_SYS_L2CACHE_OFF
#ifndef CONFIG_SYS_L2CACHE_OFF
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
/* Serial drivers */
-#define CONFIG_BAUDRATE 115200
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
#define CONFIG_ARM_DCC
-#define CONFIG_ZYNQ_SERIAL
/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM)
-# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-# define CONFIG_PHY_MARVELL
-# define CONFIG_PHY_REALTEK
-# define CONFIG_PHY_XILINX
-# define CONFIG_BOOTP_SERVERIP
-# define CONFIG_BOOTP_BOOTPATH
-# define CONFIG_BOOTP_GATEWAY
-# define CONFIG_BOOTP_HOSTNAME
# define CONFIG_BOOTP_MAY_FAIL
#endif
-/* SPI */
-#ifdef CONFIG_ZYNQ_SPI
-#endif
-
/* QSPI */
-#ifdef CONFIG_ZYNQ_QSPI
-# define CONFIG_SF_DEFAULT_SPEED 30000000
-# define CONFIG_SPI_FLASH_ISSI
-#endif
/* NOR */
-#ifndef CONFIG_SYS_NO_FLASH
+#ifdef CONFIG_MTD_NOR_FLASH
# define CONFIG_SYS_FLASH_BASE 0xE2000000
# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
# define CONFIG_SYS_MAX_FLASH_BANKS 1
# define CONFIG_SYS_FLASH_ERASE_TOUT 1000
# define CONFIG_SYS_FLASH_WRITE_TOUT 5000
# define CONFIG_FLASH_SHOW_PROGRESS 10
-# define CONFIG_SYS_FLASH_CFI
# undef CONFIG_SYS_FLASH_EMPTY_INFO
-# define CONFIG_FLASH_CFI_DRIVER
-# undef CONFIG_SYS_FLASH_PROTECTION
-# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#endif
-/* MMC */
-#if defined(CONFIG_ZYNQ_SDHCI)
-# define CONFIG_MMC
-# define CONFIG_GENERIC_MMC
-# define CONFIG_SDHCI
-# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
+#ifdef CONFIG_NAND_ZYNQ
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_ONFI_DETECTION
#endif
#ifdef CONFIG_USB_EHCI_ZYNQ
# define CONFIG_EHCI_IS_TDI
-# define CONFIG_USB_MAX_CONTROLLER_COUNT 2
# define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
# define DFU_DEFAULT_POLL_TIMEOUT 300
# define CONFIG_USB_CABLE_CHECK
-# define CONFIG_CMD_THOR_DOWNLOAD
# define CONFIG_THOR_RESET_OFF
-# define CONFIG_USB_FUNCTION_THOR
# define DFU_ALT_INFO_RAM \
"dfu_ram_info=" \
- "set dfu_alt_info " \
+ "setenv dfu_alt_info " \
"${kernel_image} ram 0x3000000 0x500000\\\\;" \
"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
"${ramdisk_image} ram 0x2000000 0x600000\0" \
"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
-# if defined(CONFIG_ZYNQ_SDHCI)
+# if defined(CONFIG_MMC_SDHCI_ZYNQ)
# define DFU_ALT_INFO_MMC \
"dfu_mmc_info=" \
- "set dfu_alt_info " \
+ "setenv dfu_alt_info " \
"${kernel_image} fat 0 1\\\\;" \
"${devicetree_image} fat 0 1\\\\;" \
"${ramdisk_image} fat 0 1\0" \
# define DFU_ALT_INFO
#endif
-#if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
-# define CONFIG_SUPPORT_VFAT
-# define CONFIG_FAT_WRITE
-# define CONFIG_DOS_PARTITION
-#endif
+/* Allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* enable preboot to be loaded before CONFIG_BOOTDELAY */
+#define CONFIG_PREBOOT
-#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
-#define CONFIG_SYS_I2C_ZYNQ
+/* Boot configuration */
+#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
+
+#ifdef CONFIG_SPL_BUILD
+#define BOOTENV
+#else
+
+#ifdef CONFIG_CMD_MMC
+#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
+#else
+#define BOOT_TARGET_DEVICES_MMC(func)
#endif
-/* I2C */
-#if defined(CONFIG_SYS_I2C_ZYNQ)
-# define CONFIG_SYS_I2C
-# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
-# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
+#ifdef CONFIG_CMD_USB
+#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
+#else
+#define BOOT_TARGET_DEVICES_USB(func)
#endif
-/* EEPROM */
-#ifdef CONFIG_ZYNQ_EEPROM
-# define CONFIG_CMD_EEPROM
-# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
-# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
-# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
-# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
+#if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
+#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
+#else
+#define BOOT_TARGET_DEVICES_PXE(func)
#endif
-/* Total Size of Environment Sector */
-#define CONFIG_ENV_SIZE (128 << 10)
+#if defined(CONFIG_CMD_DHCP)
+#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
+#else
+#define BOOT_TARGET_DEVICES_DHCP(func)
+#endif
-/* Allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
+#if defined(CONFIG_ZYNQ_QSPI)
+# define BOOT_TARGET_DEVICES_QSPI(func) func(QSPI, qspi, na)
+#else
+# define BOOT_TARGET_DEVICES_QSPI(func)
+#endif
-/* Environment */
-#ifndef CONFIG_ENV_IS_NOWHERE
-# ifndef CONFIG_SYS_NO_FLASH
-/* Environment in NOR flash */
-# define CONFIG_ENV_IS_IN_FLASH
-# elif defined(CONFIG_ZYNQ_QSPI)
-/* Environment in Serial Flash */
-# define CONFIG_ENV_IS_IN_SPI_FLASH
-# elif defined(CONFIG_SYS_NO_FLASH)
-# define CONFIG_ENV_IS_NOWHERE
-# endif
+#if defined(CONFIG_NAND_ZYNQ)
+# define BOOT_TARGET_DEVICES_NAND(func) func(NAND, nand, na)
+#else
+# define BOOT_TARGET_DEVICES_NAND(func)
+#endif
-# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
-# define CONFIG_ENV_OFFSET 0xE0000
+#if defined(CONFIG_MTD_NOR_FLASH)
+# define BOOT_TARGET_DEVICES_NOR(func) func(NOR, nor, na)
+#else
+# define BOOT_TARGET_DEVICES_NOR(func)
#endif
-/* enable preboot to be loaded before CONFIG_BOOTDELAY */
-#define CONFIG_PREBOOT
+#define BOOTENV_DEV_XILINX(devtypeu, devtypel, instance) \
+ "bootcmd_xilinx=run $modeboot\0"
+
+#define BOOTENV_DEV_NAME_XILINX(devtypeu, devtypel, instance) \
+ "xilinx "
+
+#define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \
+ "bootcmd_qspi=sf probe 0 0 0 && " \
+ "sf read $scriptaddr $script_offset_f $script_size_f && " \
+ "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_QSPI(devtypeu, devtypel, instance) \
+ "qspi "
+
+#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
+ "bootcmd_nand=nand info && " \
+ "nand read $scriptaddr $script_offset_f $script_size_f && " \
+ "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
+ "nand "
+
+#define BOOTENV_DEV_NOR(devtypeu, devtypel, instance) \
+ "bootcmd_nor=cp.b $scropt_offset_nor $scriptaddr $script_size_f && " \
+ "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_NOR(devtypeu, devtypel, instance) \
+ "nor "
+
+#define BOOT_TARGET_DEVICES(func) \
+ BOOT_TARGET_DEVICES_MMC(func) \
+ BOOT_TARGET_DEVICES_QSPI(func) \
+ BOOT_TARGET_DEVICES_NAND(func) \
+ BOOT_TARGET_DEVICES_NOR(func) \
+ BOOT_TARGET_DEVICES_USB(func) \
+ BOOT_TARGET_DEVICES_PXE(func) \
+ BOOT_TARGET_DEVICES_DHCP(func) \
+ func(XILINX, xilinx, na)
+
+#include <config_distro_bootcmd.h>
+#endif /* CONFIG_SPL_BUILD */
/* Default environment */
#ifndef CONFIG_EXTRA_ENV_SETTINGS
"nor_flash_off=0xE2100000\0" \
"fdt_high=0x20000000\0" \
"initrd_high=0x20000000\0" \
+ "scriptaddr=0x20000\0" \
+ "script_offser_nor=0xE2FC0000\0" \
+ "script_offset_f=0xFC0000\0" \
+ "script_size_f=0x40000\0" \
"loadbootenv_addr=0x2000000\0" \
+ "fdt_addr_r=0x1f00000\0" \
+ "pxefile_addr_r=0x2000000\0" \
+ "kernel_addr_r=0x2000000\0" \
+ "scriptaddr=0x3000000\0" \
+ "ramdisk_addr_r=0x3100000\0" \
"bootenv=uEnv.txt\0" \
"bootenv_dev=mmc\0" \
"loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
"env run importbootenv; " \
"fi; " \
"fi; \0" \
- "sd_loadbootenv=set bootenv_dev mmc && " \
+ "sd_loadbootenv=setenv bootenv_dev mmc && " \
"run setbootenv \0" \
- "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
+ "usb_loadbootenv=setenv bootenv_dev usb && usb start && run setbootenv \0" \
"preboot=if test $modeboot = sdboot; then " \
"run sd_loadbootenv; " \
"echo Checking if uenvcmd is set ...; " \
"echo Copying FIT from USB to RAM... && " \
"load usb 0 ${load_addr} ${fit_image} && " \
"bootm ${load_addr}; fi\0" \
- DFU_ALT_INFO
+ DFU_ALT_INFO \
+ BOOTENV
#endif
-#define CONFIG_BOOTCOMMAND "run $modeboot"
-#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
-
/* Miscellaneous configurable options */
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_BOARD_LATE_INIT
-#define CONFIG_SYS_LONGHELP
#define CONFIG_CLOCKS
-#define CONFIG_CMD_CLK
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-
-/* Physical Memory map */
-#define CONFIG_SYS_TEXT_BASE 0x4000000
-
-#ifndef CONFIG_NR_DRAM_BANKS
-# define CONFIG_NR_DRAM_BANKS 1
-#endif
#define CONFIG_SYS_MEMTEST_START 0
#define CONFIG_SYS_MEMTEST_END 0x1000
-#define CONFIG_SYS_MALLOC_LEN 0x1400000
-
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
-/* Enable the PL to be downloaded */
-#define CONFIG_FPGA
-#define CONFIG_FPGA_XILINX
-#define CONFIG_FPGA_ZYNQPL
-#define CONFIG_CMD_FPGA_LOADMK
-#define CONFIG_CMD_FPGA_LOADP
-#define CONFIG_CMD_FPGA_LOADBP
-#define CONFIG_CMD_FPGA_LOADFS
-
-/* FIT support */
-#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
-
-/* FDT support */
-#define CONFIG_DISPLAY_BOARDINFO_LATE
/* Extend size of kernel image for uncompression */
#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
#define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
-/* Commands */
-
-/* SPL part */
-#define CONFIG_CMD_SPL
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_RAM_DEVICE
-
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds"
-
/* MMC support */
-#ifdef CONFIG_ZYNQ_SDHCI
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
-#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
+#ifdef CONFIG_MMC_SDHCI_ZYNQ
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#endif
/* Disable dcache for SPL just for sure */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_DCACHE_OFF
-#undef CONFIG_FPGA
#endif
/* Address in RAM where the parameters must be copied by SPL. */
/* qspi mode is working fine */
#ifdef CONFIG_ZYNQ_QSPI
-#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
#define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
CONFIG_SYS_SPI_ARGS_SIZE)
#endif
-/* for booting directly linux */
-
/* SP location before relocation, must use scratch RAM */
-#define CONFIG_SPL_TEXT_BASE 0x0
/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
#define CONFIG_SPL_MAX_SIZE 0x30000
-/* The highest 64k OCM address */
-#define OCM_HIGH_ADDR 0xffff0000
-
/* On the top of OCM space */
-#define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000
+#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000
/*
* SPL stack position - and stack goes down
#define CONFIG_SPL_BSS_START_ADDR 0x100000
#define CONFIG_SPL_BSS_MAX_SIZE 0x100000
+#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
+
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
#endif /* __CONFIG_ZYNQ_COMMON_H */
projects / platform / kernel / u-boot.git / blobdiff