+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2007-2013 Tensilica, Inc.
* Copyright (C) 2014 - 2016 Cadence Design Systems Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
/*==============================*/
#define CONFIG_BOARD_POSTCLK_INIT
-#define CONFIG_MISC_INIT_R
#define CONFIG_BOOTFILE "uImage"
/* Console I/O Buffer Size */
/* U-Boot autoboot configuration */
/*==============================*/
-#define CONFIG_AUTO_COMPLETE /* Support tab autocompletion */
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
#define CONFIG_MX_CYCLIC
#define CONFIG_SHOW_BOOT_PROGRESS
/* Input clk to NS16550 (in Hz; the SYS_CLK_FREQ is in kHz) */
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_CLK_FREQ
-#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*======================*/