+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2008 Extreme Engineering Solutions, Inc.
* Copyright 2004-2008 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/*
/*
* DDR config
*/
-#undef CONFIG_FSL_DDR_INTERACTIVE
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#define CONFIG_DDR_SPD
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \
{0xfbf40000, 0xc0000} }
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
/*
* Networking options
*/
-#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_ETHPRIME "eTSEC1"
#define CONFIG_TSEC1 1
*/
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
-#define CONFIG_PREBOOT /* enable preboot variable */
#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */