mx35: mx35pdk: fix when cache functions are linked

[platform/kernel/u-boot.git] / include / configs / xpedite517x.h

diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index 2b6e895..20b4340 100644 (file)
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -108,6 +108,21 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_ALT_MEMTEST
 #define CONFIG_SYS_MEMTEST_START       0x10000000
 #define CONFIG_SYS_MEMTEST_END         0x20000000
+#define CONFIG_POST                    (CONFIG_SYS_POST_MEMORY |\
+                                        CONFIG_SYS_POST_I2C)
+#define I2C_ADDR_LIST                  {CONFIG_SYS_I2C_DS1621_ADDR,    \
+                                        CONFIG_SYS_I2C_DS4510_ADDR,    \
+                                        CONFIG_SYS_I2C_EEPROM_ADDR,    \
+                                        CONFIG_SYS_I2C_LM90_ADDR,      \
+                                        CONFIG_SYS_I2C_PCA9553_ADDR,   \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR0,  \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR1,  \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR2,  \
+                                        CONFIG_SYS_I2C_PCA953X_ADDR3,  \
+                                        CONFIG_SYS_I2C_PEX8518_ADDR,   \
+                                        CONFIG_SYS_I2C_RTC_ADDR}
+/* The XPedite5170 can host an XMC which has an EEPROM at address 0x50 */
+#define I2C_ADDR_IGNORE_LIST           {0x50}
 
 /*
  * Memory map
@@ -203,10 +218,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CONFIG_SYS_INIT_RAM_LOCK       1
 #define CONFIG_SYS_INIT_RAM_ADDR       0xe0000000
-#define CONFIG_SYS_INIT_RAM_END                0x00004000
+#define CONFIG_SYS_INIT_RAM_SIZE               0x00004000
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_LEN         (512 * 1024)    /* Reserve 512 KB for Mon */
@@ -259,6 +273,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_I2C_DS1621_ADDR     0x48
 #define CONFIG_DTT_DS1621
 #define CONFIG_DTT_SENSORS             { 0 }
+#define CONFIG_SYS_I2C_LM90_ADDR       0x4c
 
 /* I2C EEPROM - AT24C128B */
 #define CONFIG_SYS_I2C_EEPROM_ADDR             0x54
@@ -282,6 +297,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_I2C_PCA953X_ADDR2   0x1e
 #define CONFIG_SYS_I2C_PCA953X_ADDR3   0x1f
 #define CONFIG_SYS_I2C_PCA953X_ADDR    CONFIG_SYS_I2C_PCA953X_ADDR0
+#define CONFIG_SYS_I2C_PCA9553_ADDR    0x62
 
 /*
  * PU = pulled high, PD = pulled low
@@ -345,7 +361,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
 #define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
-#define CONFIG_NET_MULTI       1
 #define CONFIG_MII             1       /* MII PHY management */
 #define CONFIG_ETHPRIME                "eTSEC1"