* Copyright 2009 Extreme Engineering Solutions, Inc.
* Copyright 2007-2008 Freescale Semiconductor, Inc.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
/*
/*
* High Level Configuration Options
*/
-#define CONFIG_MPC86xx 1 /* MPC86xx */
-#define CONFIG_MPC8641 1 /* MPC8641 specific */
#define CONFIG_XPEDITE5140 1 /* MPC8641HPCN board specific */
#define CONFIG_SYS_BOARD_NAME "XPedite5170"
#define CONFIG_SYS_FORM_3U_VPX 1
#define CONFIG_SYS_TEXT_BASE 0xfff00000
-#define CONFIG_PCI 1 /* Enable PCI/PCIE */
-#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
-#define CONFIG_PCIE1 1 /* PCIE controler 1 */
-#define CONFIG_PCIE2 1 /* PCIE controler 2 */
+#define CONFIG_PCIE1 1 /* PCIE controller 1 */
+#define CONFIG_PCIE2 1 /* PCIE controller 2 */
#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
#define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
-#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* DDR config
*/
-#define CONFIG_FSL_DDR2
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#define CONFIG_DDR_SPD
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x54 /* Both channels use the */
#define SPD_EEPROM_ADDRESS2 0x54 /* same SPD data */
#define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */
-#define CONFIG_NUM_DDR_CONTROLLERS 2
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 1
#define CONFIG_DDR_ECC
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
*/
-#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CONFIG_SYS_CCSRBAR 0xef000000 /* relocated CCSRBAR */
#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
#define CONFIG_SYS_NAND_ACTL_CLE (1 << 15) /* C_LA15 */
#define CONFIG_SYS_NAND_ACTL_NCE 0 /* NCE not controlled by ADDR */
#define CONFIG_SYS_NAND_ACTL_DELAY 25
-#define CONFIG_SYS_NAND_QUIET_TEST
#define CONFIG_JFFS2_NAND
/*
* Serial Port
*/
#define CONFIG_CONS_INDEX 1
-#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
/*
- * Use the HUSH parser
- */
-#define CONFIG_SYS_HUSH_PARSER
-
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_OF_BOARD_SETUP 1
-#define CONFIG_OF_STDOUT_VIA_ALIAS 1
-
-/*
* I2C
*/
#define CONFIG_SYS_I2C
/*
* Command configuration.
*/
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DHCP
#define CONFIG_CMD_DS4510
#define CONFIG_CMD_DS4510_INFO
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_SAVEENV
-#define CONFIG_CMD_FLASH
-#define CONFIG_CMD_I2C
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_NET
#define CONFIG_CMD_PCA953X
#define CONFIG_CMD_PCA953X_INFO
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PCI_ENUM
-#define CONFIG_CMD_PING
#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_SNTP
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
#define CONFIG_PANIC_HANG /* do not reset board on panic */
#define CONFIG_PREBOOT /* enable preboot variable */
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1
#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
/*
"osfile=/home/user/board.uImage\0" \
"fdtfile=/home/user/board.dtb\0" \
"ubootfile=/home/user/u-boot.bin\0" \
- "fdtaddr=c00000\0" \
+ "fdtaddr=0x1e00000\0" \
"osaddr=0x1000000\0" \
"loadaddr=0x1000000\0" \
"prog_uboot1="CONFIG_PROG_UBOOT1"\0" \
projects / platform / kernel / u-boot.git / blobdiff