Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value

[platform/kernel/u-boot.git] / include / configs / xm250.h

diff --git a/include/configs/xm250.h b/include/configs/xm250.h
index 16af845..497cb91 100644 (file)
--- a/include/configs/xm250.h
+++ b/include/configs/xm250.h
@@ -35,6 +35,10 @@
 #define CONFIG_PXA250         1        /* This is an PXA250 CPU        */
 #define CONFIG_XM250          1        /* on a MicroSys XM250 Board    */
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff  */
+#define        CONFIG_SYS_TEXT_BASE    0x0
+
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
 
 /*
  * Size of malloc() pool; this lives below the uppermost 128 KiB which are
@@ -42,12 +46,12 @@
  *
  */
 #define CONFIG_SYS_MALLOC_LEN          (256*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 
 /*
  * Hardware drivers
  */
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC91111
 #define CONFIG_SMC91111_BASE           0x04000300
 #undef CONFIG_SMC91111_EXT_PHY
 #define CONFIG_SMC_USE_32_BIT
@@ -74,6 +78,7 @@
 /*
  * select serial console configuration
  */
+#define CONFIG_PXA_SERIAL
 #define CONFIG_FFUART         1       /* we use FFUART */
 
 /* allow to overwrite serial and ethaddr */
@@ -117,11 +122,9 @@
 #define CONFIG_SYS_MEMTEST_START       0xa0400000      /* memtest works on             */
 #define CONFIG_SYS_MEMTEST_END         0xa0800000      /* 4 ... 8 MB in DRAM           */
 
-#undef CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
-
 #define CONFIG_SYS_LOAD_ADDR           0xa3000000      /* default load address */
 
-#define CONFIG_SYS_HZ                  3686400         /* incrementer freq: 3.6864 MHz */
+#define CONFIG_SYS_HZ                  1000
 #define CONFIG_SYS_CPUSPEED            0x161           /* set core clock to 400/400/100 MHz */
 
                                                /* valid baudrates */
@@ -171,6 +174,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * FLASH and environment organization
  */
@@ -316,9 +322,9 @@
  * Clocks, power control and interrupts
  */
 #define CONFIG_SYS_PSSR_VAL        0x00000030
-#define CONFIG_SYS_CCCR_VAL        0x00000161  /* 100 MHz memory, 400 MHz CPU, 400 Turbo  */
-#define CONFIG_SYS_CKEN_VAL        0x000141ec  /* FFUART and STUART enabled    */
-#define CONFIG_SYS_ICMR_VAL        0x00000000  /* No interrupts enabled        */
+#define CONFIG_SYS_CCCR                    0x00000161  /* 100 MHz memory, 400 MHz CPU, 400 Turbo  */
+#define CONFIG_SYS_CKEN                    0x000141ec  /* FFUART and STUART enabled    */
+#define CONFIG_SYS_ICMR                    0x00000000  /* No interrupts enabled        */
 
 /* FIXME
  *
@@ -337,6 +343,8 @@
 #define CONFIG_SYS_MDCNFG_VAL      0x000009c9
 #define CONFIG_SYS_MDMRS_VAL       0x00220022
 #define CONFIG_SYS_MDREFR_VAL      0x000da018  /* Initial setting, individual bits set in lowlevel_init.S */
+#define        CONFIG_SYS_FLYCNFG_VAL          0x00000000
+#define        CONFIG_SYS_SXCNFG_VAL           0x00000000
 
 /*
  * PCMCIA and CF Interfaces (NOT USED, these values from lubbock init)