*
* Copyright (C) 2012 Stefan Roese <sr@denx.de>
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#include <asm/arch/hardware.h>
/* Timer, HZ specific defines */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_HZ_CLOCK 8300000
#define CONFIG_SYS_TEXT_BASE 0x00800040
/* Ethernet config options */
#define CONFIG_MII
#define CONFIG_DESIGNWARE_ETH
-#define CONFIG_DW_SEARCH_PHY
#define CONFIG_NET_MULTI
+#define CONFIG_PHYLIB
#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
-#define CONFIG_DW_AUTONEG
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
/* I2C config options */
#define CONFIG_HARD_I2C
#define CONFIG_DW_I2C
+#define CONFIG_SYS_I2C_BASE 0xD0200000
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x02
#define CONFIG_I2C_CHIPADDRESS 0x50
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ENV
#define CONFIG_CMD_FPGA
+#define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MEMORY
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_LOAD_ADDR 0x00800000
#define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_SYS_64BIT_VSPRINTF
/* Use last 2 lwords in internal SRAM for bootcounter */
#define CONFIG_BOOTCOUNT_LIMIT
/*
* SPL related defines
*/
-#define CONFIG_SPL
#define CONFIG_SPL_TEXT_BASE 0xd2800b00
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear"
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds"