/*
* Memory configurations
*/
-#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
-#define CONFIG_SYS_SDRAM_SIZE SZ_128M
-
-#define CONFIG_RTC_DS1374
+#define CFG_SYS_SDRAM_BASE EMC_DYCS0_BASE
+#define CFG_SYS_SDRAM_SIZE SZ_128M
/*
* U-Boot General Configurations
* NAND chip timings for FIXME: which one?
*/
-#define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333
-#define CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000
-#define CONFIG_LPC32XX_NAND_MLC_NAND_TA 18181818
-#define CONFIG_LPC32XX_NAND_MLC_RD_HIGH 31250000
-#define CONFIG_LPC32XX_NAND_MLC_RD_LOW 45454545
-#define CONFIG_LPC32XX_NAND_MLC_WR_HIGH 40000000
-#define CONFIG_LPC32XX_NAND_MLC_WR_LOW 83333333
+#define CFG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333
+#define CFG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000
+#define CFG_LPC32XX_NAND_MLC_NAND_TA 18181818
+#define CFG_LPC32XX_NAND_MLC_RD_HIGH 31250000
+#define CFG_LPC32XX_NAND_MLC_RD_LOW 45454545
+#define CFG_LPC32XX_NAND_MLC_WR_HIGH 40000000
+#define CFG_LPC32XX_NAND_MLC_WR_LOW 83333333
/*
* NAND
*/
/* driver configuration */
-#define CONFIG_SYS_MAX_NAND_CHIPS 1
+#define CFG_SYS_MAX_NAND_CHIPS 1
#define CFG_SYS_NAND_BASE MLC_NAND_BASE
/*