#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
#define CONFIG_SYS_SDRAM_SIZE SZ_128M
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \
- - GENERATED_GBL_DATA_SIZE)
-
#define CONFIG_RTC_DS1374
/*
/* SPL will be executed at offset 0 */
/* SPL will use SRAM as stack */
-#define CONFIG_SPL_STACK 0x0000FFF8
/* Use the framework and generic lib */
/* SPL will use serial */
/* SPL will load U-Boot from NAND offset 0x40000 */