imx: wandboard: convert FEC support to DM_ETH

[platform/kernel/u-boot.git] / include / configs / wb50n.h

diff --git a/include/configs/wb50n.h b/include/configs/wb50n.h
index 028e3ff..6e471f6 100644 (file)
--- a/include/configs/wb50n.h
+++ b/include/configs/wb50n.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Configuation settings for the WB50N CPU Module.
- *
- * SPDX-License-Identifier: GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -13,8 +12,6 @@
 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000       /* from 12 MHz crystal */
 
-#define CONFIG_ARCH_CPU_INIT
-
 #define CONFIG_CMDLINE_TAG     /* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
@@ -23,8 +20,6 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #endif
 
-#define CONFIG_IMAGE_FORMAT_LEGACY
-
 /* general purpose I/O */
 #define CONFIG_AT91_GPIO
 
@@ -39,7 +34,6 @@
 #define CONFIG_BOOTP_BOOTFILESIZE
 
 /* SDRAM */
-#define CONFIG_NR_DRAM_BANKS        1
 #define CONFIG_SYS_SDRAM_BASE       ATMEL_BASE_DDRCS
 #define CONFIG_SYS_SDRAM_SIZE       0x04000000
 
@@ -54,7 +48,6 @@
 #define CONFIG_SYS_MEMTEST_END      0x22000000
 
 /* NAND flash */
-#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE  1
 #define CONFIG_SYS_NAND_BASE        ATMEL_BASE_CS3
 /* our ALE is AD21 */
@@ -62,11 +55,6 @@
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE    (1 << 22)
 #define CONFIG_SYS_NAND_ONFI_DETECTION
-/* PMECC & PMERRLOC */
-#define CONFIG_ATMEL_NAND_HWECC
-#define CONFIG_ATMEL_NAND_HW_PMECC
-#define CONFIG_PMECC_CAP            8
-#define CONFIG_PMECC_SECTOR_SIZE    512
 
 /* Ethernet Hardware */
 #define CONFIG_MACB
@@ -84,9 +72,7 @@
     "autostart=no\0"
 
 /* bootstrap + u-boot + env in nandflash */
-#define CONFIG_ENV_OFFSET           0xA0000
 #define CONFIG_ENV_OFFSET_REDUND    0xC0000
-#define CONFIG_ENV_SIZE             0x20000
 #define CONFIG_BOOTCOMMAND \
     "nand read 0x22000000 0x000e0000 0x500000; " \
     "bootm"
@@ -105,7 +91,6 @@
 #define CONFIG_SYS_MALLOC_LEN       (2 * 1024 * 1024)
 
 /* SPL */
-#define CONFIG_SPL_TEXT_BASE        0x300000
 #define CONFIG_SPL_MAX_SIZE         0x10000
 #define CONFIG_SPL_BSS_START_ADDR   0x20000000
 #define CONFIG_SPL_BSS_MAX_SIZE     0x80000
@@ -123,6 +108,5 @@
 #define CONFIG_SYS_NAND_OOBSIZE     64
 #define CONFIG_SYS_NAND_BLOCK_SIZE  0x20000
 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
-#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 
 #endif