powerpc/p4080ds: Move ICS refclk define into P4080DS.h
[platform/kernel/u-boot.git] / include / configs / vpac270.h
index fc680fc..35afcd3 100644 (file)
  */
 #define        CONFIG_PXA27X           1       /* Marvell PXA270 CPU */
 #define        CONFIG_VPAC270          1       /* Voipac PXA270 board */
+#define        CONFIG_SYS_TEXT_BASE    0x0
 
 /*
  * Environment settings
  */
 #define        CONFIG_ENV_OVERWRITE
 #define        CONFIG_SYS_MALLOC_LEN           (128*1024)
-#define        CONFIG_SYS_GBL_DATA_SIZE        128
 #define        CONFIG_ARCH_CPU_INIT
 #define        CONFIG_BOOTCOMMAND                                              \
        "if mmc init && fatload mmc 0 0xa4000000 uImage; then "         \
@@ -75,7 +75,7 @@
 #undef CONFIG_LCD
 #define        CONFIG_CMD_IDE
 
-#ifdef CONFIG_ONENAND_U_BOOT
+#ifdef CONFIG_ONENAND
 #undef CONFIG_CMD_FLASH
 #define        CONFIG_CMD_ONENAND
 #else
 #define        PHYS_SDRAM_1                    0xa0000000      /* SDRAM Bank #1 */
 #define        PHYS_SDRAM_1_SIZE               0x08000000      /* 128 MB */
 
-#ifdef CONFIG_256M_U_BOOT
+#ifdef CONFIG_RAM_256M
 #define        PHYS_SDRAM_2                    0x80000000      /* SDRAM Bank #2 */
 #define        PHYS_SDRAM_2_SIZE               0x08000000      /* 128 MB */
 #endif
 
 #define        CONFIG_SYS_DRAM_BASE            0xa0000000      /* CS0 */
-#ifdef CONFIG_256M_U_BOOT
+#ifdef CONFIG_RAM_256M
 #define        CONFIG_SYS_DRAM_SIZE            0x10000000      /* 256 MB DRAM */
 #else
 #define        CONFIG_SYS_DRAM_SIZE            0x08000000      /* 128 MB DRAM */
 #define        CONFIG_SYS_IPL_LOAD_ADDR        (0x5c000000)
 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
 #define        CONFIG_SYS_INIT_SP_ADDR         \
-       (PHYS_SDRAM_1 + CONFIG_SYS_GBL_DATA_SIZE + 2048)
+       (PHYS_SDRAM_1 + GENERATED_GBL_DATA_SIZE + 2048)
 
 /*
  * NOR FLASH
 #if    defined(CONFIG_CMD_FLASH)       /* NOR */
 #define        PHYS_FLASH_1                    0x00000000      /* Flash Bank #1 */
 
-#ifdef CONFIG_256M_U_BOOT
+#ifdef CONFIG_RAM_256M
 #define        PHYS_FLASH_2                    0x02000000      /* Flash Bank #2 */
 #endif
 
 #define        CONFIG_FLASH_CFI_DRIVER         1
 
 #define        CONFIG_SYS_MAX_FLASH_SECT       (4 + 255)
-#ifdef CONFIG_256M_U_BOOT
+#ifdef CONFIG_RAM_256M
 #define        CONFIG_SYS_MAX_FLASH_BANKS      2
 #define        CONFIG_SYS_FLASH_BANKS_LIST     { PHYS_FLASH_1, PHYS_FLASH_2 }
 #else
 #define        CONFIG_SYS_MSC0_VAL     0x3ffc95fa
 #define        CONFIG_SYS_MSC1_VAL     0x02ccf974
 #define        CONFIG_SYS_MSC2_VAL     0x00000000
-#ifdef CONFIG_256M_U_BOOT
+#ifdef CONFIG_RAM_256M
 #define        CONFIG_SYS_MDCNFG_VAL   0x8ad30ad3
 #else
 #define        CONFIG_SYS_MDCNFG_VAL   0x88000ad3