powerpc/p4080ds: Move ICS refclk define into P4080DS.h

[platform/kernel/u-boot.git] / include / configs / vpac270.h

diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h
index 694a8f9..35afcd3 100644 (file)
--- a/include/configs/vpac270.h
+++ b/include/configs/vpac270.h
@@ -27,14 +27,14 @@
  */
 #define        CONFIG_PXA27X           1       /* Marvell PXA270 CPU */
 #define        CONFIG_VPAC270          1       /* Voipac PXA270 board */
+#define        CONFIG_SYS_TEXT_BASE    0x0
 
 /*
  * Environment settings
  */
 #define        CONFIG_ENV_OVERWRITE
 #define        CONFIG_SYS_MALLOC_LEN           (128*1024)
-#define        CONFIG_SYS_GBL_DATA_SIZE        128
-
+#define        CONFIG_ARCH_CPU_INIT
 #define        CONFIG_BOOTCOMMAND                                              \
        "if mmc init && fatload mmc 0 0xa4000000 uImage; then "         \
                "bootm 0xa4000000; "                                    \
@@ -45,13 +45,13 @@
        "if ide reset && fatload ide 0 0xa4000000 uImage; then "        \
                "bootm 0xa4000000; "                                    \
        "fi; "                                                          \
-       "bootm 0x40000;"
+       "bootm 0x60000;"
 #define        CONFIG_BOOTARGS                 "console=tty0 console=ttyS0,115200"
 #define        CONFIG_TIMESTAMP
 #define        CONFIG_BOOTDELAY                2       /* Autoboot delay */
 #define        CONFIG_CMDLINE_TAG
 #define        CONFIG_SETUP_MEMORY_TAGS
-
+#define        CONFIG_SYS_TEXT_BASE            0x0
 #define        CONFIG_LZMA                     /* LZMA compression support */
 
 /*
@@ -75,7 +75,7 @@
 #undef CONFIG_LCD
 #define        CONFIG_CMD_IDE
 
-#ifdef CONFIG_ONENAND_U_BOOT
+#ifdef CONFIG_ONENAND
 #undef CONFIG_CMD_FLASH
 #define        CONFIG_CMD_ONENAND
 #else
@@ -146,8 +146,7 @@
 /*
  * Clock Configuration
  */
-#undef CONFIG_SYS_CLKS_IN_HZ
-#define        CONFIG_SYS_HZ                   3250000         /* Timer @ 3250000 Hz */
+#define        CONFIG_SYS_HZ                   1000            /* Timer @ 3250000 Hz */
 #define        CONFIG_SYS_CPUSPEED             0x190           /* 312MHz */
 
 /*
@@ -166,13 +165,13 @@
 #define        PHYS_SDRAM_1                    0xa0000000      /* SDRAM Bank #1 */
 #define        PHYS_SDRAM_1_SIZE               0x08000000      /* 128 MB */
 
-#ifdef CONFIG_256M_U_BOOT
+#ifdef CONFIG_RAM_256M
 #define        PHYS_SDRAM_2                    0x80000000      /* SDRAM Bank #2 */
 #define        PHYS_SDRAM_2_SIZE               0x08000000      /* 128 MB */
 #endif
 
 #define        CONFIG_SYS_DRAM_BASE            0xa0000000      /* CS0 */
-#ifdef CONFIG_256M_U_BOOT
+#ifdef CONFIG_RAM_256M
 #define        CONFIG_SYS_DRAM_SIZE            0x10000000      /* 256 MB DRAM */
 #else
 #define        CONFIG_SYS_DRAM_SIZE            0x08000000      /* 128 MB DRAM */
@@ -181,15 +180,25 @@
 #define        CONFIG_SYS_MEMTEST_START        0xa0400000      /* memtest works on */
 #define        CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM */
 
-#define        CONFIG_SYS_LOAD_ADDR            (0x5c000000)
+#define        CONFIG_SYS_LOAD_ADDR            PHYS_SDRAM_1
+#define        CONFIG_SYS_IPL_LOAD_ADDR        (0x5c000000)
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         \
+       (PHYS_SDRAM_1 + GENERATED_GBL_DATA_SIZE + 2048)
 
 /*
  * NOR FLASH
  */
+#define        CONFIG_SYS_MONITOR_BASE         0x0
+#define        CONFIG_SYS_MONITOR_LEN          0x40000
+#define        CONFIG_ENV_ADDR                 \
+                       (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
+#define        CONFIG_ENV_SIZE                 0x4000
+
 #if    defined(CONFIG_CMD_FLASH)       /* NOR */
 #define        PHYS_FLASH_1                    0x00000000      /* Flash Bank #1 */
 
-#ifdef CONFIG_256M_U_BOOT
+#ifdef CONFIG_RAM_256M
 #define        PHYS_FLASH_2                    0x02000000      /* Flash Bank #2 */
 #endif
 
@@ -197,7 +206,7 @@
 #define        CONFIG_FLASH_CFI_DRIVER         1
 
 #define        CONFIG_SYS_MAX_FLASH_SECT       (4 + 255)
-#ifdef CONFIG_256M_U_BOOT
+#ifdef CONFIG_RAM_256M
 #define        CONFIG_SYS_MAX_FLASH_BANKS      2
 #define        CONFIG_SYS_FLASH_BANKS_LIST     { PHYS_FLASH_1, PHYS_FLASH_2 }
 #else
@@ -212,7 +221,16 @@
 #define        CONFIG_SYS_FLASH_PROTECTION             1
 
 #define        CONFIG_ENV_IS_IN_FLASH          1
-#define        CONFIG_ENV_SECT_SIZE            0x4000
+
+/*
+ * The first four sectors of the NOR flash are 0x8000 bytes big, the rest of the
+ * flash consists of 0x20000 bytes big sectors.
+ */
+#if    (CONFIG_ENV_ADDR <= 0x18000)
+#define        CONFIG_ENV_SECT_SIZE            0x8000
+#else
+#define        CONFIG_ENV_SECT_SIZE            0x20000
+#endif
 
 #elif  defined(CONFIG_CMD_ONENAND)     /* OneNAND */
 #define        CONFIG_SYS_NO_FLASH
@@ -226,12 +244,6 @@
 #define        CONFIG_SYS_ENV_IS_NOWHERE
 #endif
 
-#define        CONFIG_SYS_MONITOR_BASE         0x0
-#define        CONFIG_SYS_MONITOR_LEN          0x40000
-
-#define        CONFIG_ENV_ADDR                 0x40000
-#define        CONFIG_ENV_SIZE                 0x4000
-
 /*
  * IDE
  */
@@ -296,7 +308,7 @@
 #define        CONFIG_SYS_MSC0_VAL     0x3ffc95fa
 #define        CONFIG_SYS_MSC1_VAL     0x02ccf974
 #define        CONFIG_SYS_MSC2_VAL     0x00000000
-#ifdef CONFIG_256M_U_BOOT
+#ifdef CONFIG_RAM_256M
 #define        CONFIG_SYS_MDCNFG_VAL   0x8ad30ad3
 #else
 #define        CONFIG_SYS_MDCNFG_VAL   0x88000ad3