mpc83xx: Get rid of CONFIG_SYS_LBC_*

[platform/kernel/u-boot.git] / include / configs / vme8349.h

diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index 2a14f56..1c3430d 100644 (file)
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -25,8 +25,6 @@
 /* Don't enable PCI2 on vme834x - it doesn't exist physically. */
 #undef CONFIG_MPC83XX_PCI2             /* support for 2nd PCI controller */
 
-#define CONFIG_SYS_IMMR                0xE0000000
-
 #undef CONFIG_SYS_DRAM_TEST                    /* memory test, takes time */
 #define CONFIG_SYS_MEMTEST_START       0x00000000      /* memtest region */
 #define CONFIG_SYS_MEMTEST_END         0x00100000
@@ -53,9 +51,7 @@
  */
 #undef CONFIG_DDR_32BIT
 
-#define CONFIG_SYS_DDR_BASE            0x00000000      /* DDR is sys memory*/
-#define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_BASE
-#define CONFIG_SYS_DDR_SDRAM_BASE      CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_SDRAM_BASE          0x00000000      /* DDR is sys memory*/
 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL  (DDR_SDRAM_CLK_CNTL_SS_EN \
                                        | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075)
 #define CONFIG_DDR_2T_TIMING
@@ -100,15 +96,6 @@
 #define CONFIG_SYS_MONITOR_LEN         (256 * 1024)    /* Reserve 256 kB */
 #define CONFIG_SYS_MALLOC_LEN          (256 * 1024)    /* Malloc size */
 
-/*
- * Local Bus LCRR and LBCR regs
- *    LCRR:  no DLL bypass, Clock divider is 4
- * External Local Bus rate is
- *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
- */
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
-#define CONFIG_SYS_LBC_LBCR    0x00000000
-
 #undef CONFIG_SYS_LB_SDRAM     /* if board has SDRAM on local bus */
 
 /*