Merge tag 'rpi-next-2020.01' of https://github.com/mbgg/u-boot

[platform/kernel/u-boot.git] / include / configs / ve8313.h

diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h
index 3a5bcf9..a31e6f4 100644 (file)
--- a/include/configs/ve8313.h
+++ b/include/configs/ve8313.h
@@ -24,14 +24,9 @@
  * On-board devices
  *
  */
-#define CONFIG_SYS_IMMR                0xE0000000
-
 #define CONFIG_SYS_MEMTEST_START       0x00001000
 #define CONFIG_SYS_MEMTEST_END         0x07000000
 
-#define CONFIG_SYS_ACR_PIPE_DEP                3       /* Arbiter pipeline depth */
-#define CONFIG_SYS_ACR_RPTCNT          3       /* Arbiter repeat count */
-
 /*
  * Device configurations
  */
@@ -39,9 +34,7 @@
 /*
  * DDR Setup
  */
-#define CONFIG_SYS_DDR_BASE            0x00000000 /* DDR is system memory*/
-#define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_BASE
-#define CONFIG_SYS_DDR_SDRAM_BASE      CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_SDRAM_BASE          0x00000000 /* DDR is system memory*/
 
 /*
  * Manually set up DDR parameters, as this board does not
@@ -136,16 +129,6 @@
 #define CONFIG_SYS_MALLOC_LEN          (512 * 1024)
 
 /*
- * Local Bus LCRR and LBCR regs
- */
-#define CONFIG_SYS_LCRR_EADC   LCRR_EADC_3
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_2
-
-#define CONFIG_SYS_LBC_LBCR    0x00040000
-
-#define CONFIG_SYS_LBC_MRTPR   0x20000000
-
-/*
  * NAND settings
  */
 #define CONFIG_SYS_NAND_BASE           0x61000000
@@ -153,25 +136,13 @@
 #define CONFIG_NAND_FSL_ELBC 1
 #define CONFIG_SYS_NAND_BLOCK_SIZE 16384
 
-/* FLASH */
-#define CONFIG_SYS_BR0_PRELIM (0xFE000000 | BR_PS_16 | BR_MS_GPCM | BR_V)
-#define CONFIG_SYS_OR0_PRELIM (OR_AM_32MB | OR_GPCM_CSNT | OR_GPCM_ACS_DIV4 | OR_GPCM_SCY_5 | OR_GPCM_TRLX_SET | OR_GPCM_EAD)
 
-/* NAND */
-#define CONFIG_SYS_BR1_PRELIM (0x61000000 | BR_PS_8 | BR_DECC_CHK_GEN | BR_MS_FCM | BR_V)
-#define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB | OR_FCM_BCTLD | OR_FCM_CHT | OR_FCM_SCY_2 | OR_FCM_RST | OR_FCM_TRLX)
 
 /* Still needed for spl_minimal.c */
 #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR1_PRELIM
 #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM
 
-/* NVRAM */
-#define CONFIG_SYS_BR2_PRELIM  (0x60000000 | BR_PS_8 | BR_V)
-#define CONFIG_SYS_OR2_PRELIM  (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_XACS | OR_GPCM_SCY_3 | OR_GPCM_TRLX_SET | OR_GPCM_EHTR_SET | OR_GPCM_EAD)
 
-/* SRAM */
-#define CONFIG_SYS_BR3_PRELIM  (0x62000000 | BR_PS_16 | BR_V)
-#define CONFIG_SYS_OR3_PRELIM  (OR_AM_32MB | OR_GPCM_CSNT | OR_GPCM_XACS | OR_GPCM_SCY_15 | OR_GPCM_TRLX_SET | OR_GPCM_EHTR_SET | OR_GPCM_EAD)
 
 /*
  * Serial Port
@@ -224,14 +195,7 @@
 /*
  * Environment
  */
-#define CONFIG_ENV_ADDR                \
-                       (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_ENV_SECT_SIZE   0x20000 /* 128K(one sector) for env */
-#define CONFIG_ENV_SIZE                0x4000
 /* Address and size of Redundant Environment Sector */
-#define CONFIG_ENV_OFFSET_REDUND       \
-                       (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
 
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change */
@@ -280,12 +244,6 @@
                                SICRL_ETSEC2_A)
                                /* 0x33fc0003) */
 
-#define CONFIG_SYS_HID0_INIT   0x000000000
-#define CONFIG_SYS_HID0_FINAL  (HID0_ENABLE_MACHINE_CHECK | \
-                                HID0_ENABLE_INSTRUCTION_CACHE)
-
-#define CONFIG_SYS_HID2 HID2_HBE
-
 #define CONFIG_NETDEV          eth0
 
 #define CONFIG_HOSTNAME                "ve8313"