*/
#define CONFIG_MPC823 1 /* This is a MPC823 CPU */
-#define CONFIG_V37 1 /* ...on a Marel V37 board */
+#define CONFIG_V37 1 /* ...on a Marel V37 board */
#define CONFIG_LCD
#define CONFIG_SHARP_LQ084V1DG21
#endif
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
-#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo"
+#define CONFIG_PREBOOT "echo;echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;echo"
#undef CONFIG_BOOTARGS
#define CONFIG_BOOTCOMMAND \
- "tftpboot; " \
+ "tftpboot; " \
"setenv bootargs console=tty0 " \
- "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \
+ "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \
"bootm"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_CAN_DRIVER 1 /* CAN Driver support enabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-#define CFG_ENV_IS_IN_NVRAM 1
-#define CFG_ENV_ADDR 0x80000000/* Address of Environment */
-#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
+#define CONFIG_ENV_IS_IN_NVRAM 1
+#define CONFIG_ENV_ADDR 0x80000000/* Address of Environment */
+#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
-#define CFG_ENV_OFFSET 0
+#define CONFIG_ENV_OFFSET 0
/*-----------------------------------------------------------------------
* Cache Configuration
#define CFG_PRELIM_OR_AM 0xFE000000 /* OR addr mask */
-#define CFG_OR_TIMING_FLASH 0xF56
+#define CFG_OR_TIMING_FLASH 0xF56
#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_16 | BR_V)