Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

[platform/kernel/u-boot.git] / include / configs / uniphier.h

diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 1a74489..c6fc90f 100644 (file)
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -12,17 +12,6 @@
 #define CONFIG_I2C_EEPROM
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
 
-#ifdef CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_COM1                CONFIG_SUPPORT_CARD_UART_BASE
-#define CONFIG_SYS_NS16550_CLK         12288000
-#define CONFIG_SYS_NS16550_REG_SIZE    -2
-#endif
-
-/* TODO: move to Kconfig and device tree */
-#if 0
-#define CONFIG_SYS_NS16550_SERIAL
-#endif
-
 #define CONFIG_SMC911X
 
 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
@@ -39,7 +28,7 @@
 
 #define CONFIG_SYS_CACHELINE_SIZE      32
 
-/* Comment out the following to enable L2 cache */
+/* Comment out the following to disable L2 cache */
 #define CONFIG_UNIPHIER_L2CACHE_ON
 
 #define CONFIG_DISPLAY_CPUINFO
@@ -66,6 +55,7 @@
 
 #define CONFIG_SYS_MAX_FLASH_SECT      256
 #define CONFIG_SYS_MONITOR_BASE                0
+#define CONFIG_SYS_MONITOR_LEN         0x00080000      /* 512KB */
 #define CONFIG_SYS_FLASH_BASE          0
 
 /*
@@ -112,21 +102,13 @@
 /* Time clock 1MHz */
 #define CONFIG_SYS_TIMER_RATE                  1000000
 
-/*
- * By default, ARP timeout is 5 sec.
- * The first ARP request does not seem to work.
- * So we need to retry ARP request anyway.
- * We want to shrink the interval until the second ARP request.
- */
-#define CONFIG_ARP_TIMEOUT     500UL  /* 0.5 msec */
-
 #define CONFIG_SYS_MAX_NAND_DEVICE                     1
 #define CONFIG_SYS_NAND_MAX_CHIPS                      2
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 
 #define CONFIG_NAND_DENALI_ECC_SIZE                    1024
 
-#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3
+#ifdef CONFIG_ARCH_UNIPHIER_SLD3
 #define CONFIG_SYS_NAND_REGS_BASE                      0xf8100000
 #define CONFIG_SYS_NAND_DATA_BASE                      0xf8000000
 #else
@@ -233,17 +215,21 @@
        "netdev=eth0\0"                                         \
        "verify=n\0"                                            \
        "nor_base=0x42000000\0"                                 \
+       "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"    \
+               "tftpboot $tmp_addr u-boot-spl.bin &&"          \
+               "setexpr tmp_addr $nor_base + 0x60000 &&"       \
+               "tftpboot $tmp_addr u-boot.bin\0"               \
        "emmcupdate=mmcsetn &&"                                 \
                "mmc partconf $mmc_first_dev 0 1 1 &&"          \
                "mmc erase 0 800 &&"                            \
                "tftpboot u-boot-spl.bin &&"                    \
                "mmc write $loadaddr 0 80 &&"                   \
-               "tftpboot u-boot.img &&"                        \
+               "tftpboot u-boot.bin &&"                        \
                "mmc write $loadaddr 80 780\0"                  \
        "nandupdate=nand erase 0 0x00100000 &&"                 \
                "tftpboot u-boot-spl.bin &&"                    \
                "nand write $loadaddr 0 0x00010000 &&"          \
-               "tftpboot u-boot.img &&"                        \
+               "tftpboot u-boot.bin &&"                        \
                "nand write $loadaddr 0x00010000 0x000f0000\0"  \
        LINUXBOOT_ENV_SETTINGS
 
@@ -252,9 +238,8 @@
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define CONFIG_NR_DRAM_BANKS           2
 
-#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) || \
-       defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
-       defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
+#if defined(CONFIG_ARCH_UNIPHIER_SLD3) || defined(CONFIG_ARCH_UNIPHIER_LD4) || \
+       defined(CONFIG_ARCH_UNIPHIER_SLD8)
 #define CONFIG_SPL_TEXT_BASE           0x00040000
 #else
 #define CONFIG_SPL_TEXT_BASE           0x00100000
@@ -267,6 +252,7 @@
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_NOR_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_MMC_SUPPORT
 
@@ -276,8 +262,13 @@
 #define CONFIG_SPL_BOARD_INIT
 
 #define CONFIG_SYS_NAND_U_BOOT_OFFS            0x10000
+
+/* subtract sizeof(struct image_header) */
+#define CONFIG_SYS_UBOOT_BASE                  (0x60000 - 0x40)
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR        0x80
 
+#define CONFIG_SPL_TARGET                      "u-boot-with-spl.bin"
 #define CONFIG_SPL_MAX_FOOTPRINT               0x10000
+#define CONFIG_SPL_MAX_SIZE                    0x10000
 
 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */