status_led: Kconfig migration

[platform/kernel/u-boot.git] / include / configs / tricorder.h

diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index 855d789..a961e5c 100644 (file)
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -16,18 +16,14 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_CACHELINE_SIZE      64
-
 /* High Level Configuration Options */
 #define CONFIG_SYS_THUMB_BUILD
 #define CONFIG_OMAP                    /* in a TI OMAP core */
-#define CONFIG_OMAP_COMMON
 /* Common ARM Erratas */
 #define CONFIG_ARM_ERRATA_454179
 #define CONFIG_ARM_ERRATA_430973
 #define CONFIG_ARM_ERRATA_621766
 
-#define CONFIG_MACH_TYPE               MACH_TYPE_TRICORDER
 /*
  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  * 64 bytes before this address should be set aside for u-boot.img's
@@ -41,13 +37,6 @@
 #include <asm/arch/cpu.h>              /* get chip and board defs */
 #include <asm/arch/omap.h>
 
-/* Display CPU and Board information */
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
-
-#define CONFIG_SILENT_CONSOLE
-#define CONFIG_ZERO_BOOTDELAY_CHECK
-
 /* Clock Defines */
 #define V_OSCK                         26000000 /* Clock output from T2 */
 #define V_SCLK                         (V_OSCK >> 1)
@@ -71,18 +60,6 @@
 #define CONFIG_OMAP3_GPIO_2            /* GPIO32..63 are in GPIO bank 2 */
 
 /* LED support */
-#define CONFIG_STATUS_LED
-#define CONFIG_BOARD_SPECIFIC_LED
-#define CONFIG_CMD_LED                 /* LED command */
-#define STATUS_LED_BIT                 (1 << 0)
-#define STATUS_LED_STATE               STATUS_LED_ON
-#define STATUS_LED_PERIOD              (CONFIG_SYS_HZ / 2)
-#define STATUS_LED_BIT1                        (1 << 1)
-#define STATUS_LED_STATE1              STATUS_LED_ON
-#define STATUS_LED_PERIOD1             (CONFIG_SYS_HZ / 2)
-#define STATUS_LED_BIT2                        (1 << 2)
-#define STATUS_LED_STATE2              STATUS_LED_ON
-#define STATUS_LED_PERIOD2             (CONFIG_SYS_HZ / 2)
 
 /* NS16550 Configuration */
 #define CONFIG_SYS_NS16550_SERIAL
@@ -99,8 +76,6 @@
 
 /* MMC */
 #define CONFIG_GENERIC_MMC
-#define CONFIG_MMC
-#define CONFIG_OMAP_HSMMC
 #define CONFIG_DOS_PARTITION
 
 /* I2C */
@@ -149,7 +124,6 @@
 #define CONFIG_CMD_MTDPARTS            /* Enable MTD parts commands */
 #define CONFIG_CMD_NAND                        /* NAND support */
 #define CONFIG_CMD_NAND_LOCK_UNLOCK    /* nand (un)lock commands */
-#define CONFIG_CMD_UBI                 /* UBI commands */
 #define CONFIG_CMD_UBIFS               /* UBIFS commands */
 #define CONFIG_LZO                     /* LZO is needed for UBIFS */
 
@@ -162,7 +136,6 @@
 
 /* Environment information (this is the common part) */
 
-#define CONFIG_BOOTDELAY               0
 
 /* hang() the board on panic() */
 #define CONFIG_PANIC_HANG
@@ -323,26 +296,16 @@
 #define CONFIG_SPL_NAND_SIMPLE
 
 #define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/omap-common/u-boot-spl.lds"
+#define CONFIG_SPL_LDSCRIPT            "arch/arm/mach-omap2/u-boot-spl.lds"
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "u-boot.img"
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 
 #define CONFIG_SPL_TEXT_BASE           0x40200000 /*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE            (57 * 1024)     /* 7 KB for stack */
+#define CONFIG_SPL_MAX_SIZE            (SRAM_SCRATCH_SPACE_ADDR - \
+                                        CONFIG_SPL_TEXT_BASE)
 
 #define CONFIG_SPL_BSS_START_ADDR      0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000