/* Link Definitions */
-#define CONFIG_SYS_BOOTM_LEN (64 << 20)
-
#define UART0_BASE 0x7ff80000
/* PL011 Serial Configuration */
/* Top 48MB reserved for secure world use */
#define DRAM_SEC_SIZE 0x03000000
#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define PHYS_SDRAM_2 0x8080000000
#define PHYS_SDRAM_2_SIZE 0x180000000
-#define CONFIG_SYS_MMC_MAX_BLK_COUNT 127
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
"bootm_size=0x20000000\0" \
"load_addr=0xa0000000\0" \
"kernel_addr_r=0x80080000\0" \
* Else boot FIT image.
*/
-#define CONFIG_SYS_FLASH_BASE 0x0C000000
-/* 256 x 256KiB sectors */
-#define CONFIG_SYS_MAX_FLASH_SECT 256
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
-#define FLASH_MAX_SECTOR_SIZE 0x00040000
+#define CFG_SYS_FLASH_BASE 0x0C000000
#endif /* __TOTAL_COMPUTE_H */