+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013 Stefan Roese <sr@denx.de>
*
*
* Based on mx6qsabrelite.h which is:
* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
-#define CONFIG_MISC_INIT_R
-
-#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* I2C Configs */
#define CONFIG_SYS_FSL_USDHC_NUM 1
#define CONFIG_FEC_MXC
-#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 4
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
-#define CONFIG_SYS_MEMTEST_START 0x10000000
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20))
-
-#define CONFIG_HOSTNAME titanium
+#define CONFIG_HOSTNAME "titanium"
#define CONFIG_UBI_PART ubi
#define CONFIG_UBIFS_VOLUME rootfs0
#define CONFIG_EXTRA_ENV_SETTINGS \
- "kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
+ "kernel=" CONFIG_HOSTNAME "/uImage\0" \
"kernel_fs=/boot/uImage\0" \
"kernel_addr=11000000\0" \
- "dtb=" __stringify(CONFIG_HOSTNAME) "/" \
- __stringify(CONFIG_HOSTNAME) ".dtb\0" \
- "dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0" \
+ "dtb=" CONFIG_HOSTNAME "/" \
+ CONFIG_HOSTNAME ".dtb\0" \
+ "dtb_fs=/boot/" CONFIG_HOSTNAME ".dtb\0" \
"dtb_addr=12800000\0" \
"script=boot.scr\0" \
"uimage=uImage\0" \
"rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath}\0" \
- "ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0" \
+ "ubifs=" CONFIG_HOSTNAME "/ubifs.img\0" \
"part=" __stringify(CONFIG_UBI_PART) "\0" \
"boot_vol=0\0" \
"vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0" \
#define CONFIG_BOOTCOMMAND "run nand_ubifs"
/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE (512 << 20)
#ifdef CONFIG_CMD_NAND
/* NAND stuff */
-#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* DMA stuff, needed for GPMI/MXS NAND support */
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
/* Environment in NAND */
-#define CONFIG_ENV_OFFSET (16 << 20)
-#define CONFIG_ENV_SECT_SIZE (128 << 10)
-#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
-#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10))
-#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
#else /* CONFIG_CMD_NAND */
/* Environment in MMC */
-#define CONFIG_ENV_SIZE (8 << 10)
-#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif /* CONFIG_CMD_NAND */
/* UBI/UBIFS config options */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_MTD_PARTITIONS
#endif /* __CONFIG_H */