MIPS: convert CONFIG_SYS_MIPS_TIMER_FREQ to Kconfig

[platform/kernel/u-boot.git] / include / configs / ti_omap4_common.h

diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index 1e6f038..0568946 100644 (file)
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -12,7 +12,6 @@
 #define __CONFIG_TI_OMAP4_COMMON_H
 
 #ifndef CONFIG_SYS_L2CACHE_OFF
-#define CONFIG_SYS_L2_PL310            1
 #define CONFIG_SYS_PL310_BASE  0x48242000
 #endif
 
@@ -23,17 +22,6 @@
 /* Use General purpose timer 1 */
 #define CONFIG_SYS_TIMERBASE           GPT2_BASE
 
-/*
- * For the DDR timing information we can either dynamically determine
- * the timings to use or use pre-determined timings (based on using the
- * dynamic method.  Default to the static timing infomation.
- */
-#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
-#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
-#endif
-
 #include <configs/ti_armv7_omap.h>
 
 /*
@@ -47,9 +35,7 @@
 #endif
 
 /* TWL6030 */
-#ifndef CONFIG_SPL_BUILD
 #define CONFIG_TWL6030_POWER           1
-#endif
 
 /*
  * Environment setup
@@ -113,12 +99,9 @@
  * SPL is overlapped with public stack and breaking non HS devices to boot.
  * So moving TEXT_BASE down to non-HS limit.
  */
-#define CONFIG_SYS_SPL_ARGS_ADDR       (CONFIG_SYS_SDRAM_BASE + \
-                                        (128 << 20))
 
 #ifdef CONFIG_SPL_BUILD
 /* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
-#undef CONFIG_SYS_I2C_LEGACY
 #endif
 
 #endif /* __CONFIG_TI_OMAP4_COMMON_H */