#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1024MB */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
- GENERATED_GBL_DATA_SIZE)
/**
* Platform/Board specific defs
/* Defines for SPL */
-#define CONFIG_SPL_BSS_START_ADDR 0x80000000
-
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
/*
* header. That is 0x800FFFC0--0x80800000 should not be used for any
* other needs.
*/
-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
/*
* Since SPL did pll and ddr initialization for us,