Convert CONFIG_SYS_I2C_LEGACY to Kconfig and add CONFIG_[ST]PL_SYS_I2C_LEGACY

[platform/kernel/u-boot.git] / include / configs / theadorable.h

diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index cd92835..417b41d 100644 (file)
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -15,11 +15,6 @@
  * for DDR ECC byte filling in the SPL before loading the main
  * U-Boot into it.
  */
-#define CONFIG_SYS_TCLK                250000000       /* 250MHz */
-
-/*
- * Commands configuration
- */
 
 /*
  * The debugging version enables USB support via defconfig.
@@ -28,8 +23,6 @@
  */
 
 /* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MVTWSI
 #define CONFIG_I2C_MVTWSI_BASE0                MVEBU_TWSI_BASE
 #define CONFIG_I2C_MVTWSI_BASE1                MVEBU_TWSI1_BASE
 #define CONFIG_SYS_I2C_SLAVE           0x0
@@ -40,15 +33,9 @@
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3
 
 /* Environment in SPI NOR flash */
-#define CONFIG_ENV_OFFSET              (1 << 20) /* 1MiB in */
-#define CONFIG_ENV_SIZE                        (64 << 10) /* 64KiB */
-#define CONFIG_ENV_SECT_SIZE           (256 << 10) /* 256KiB sectors */
-#define CONFIG_ENV_OVERWRITE
 
 #define PHY_ANEG_TIMEOUT       8000    /* PHY needs a longer aneg time */
 
-#define CONFIG_PREBOOT
-
 /* Keep device tree and initrd in lower memory so the kernel can access them */
 #define CONFIG_EXTRA_ENV_SETTINGS      \
        "fdt_high=0x10000000\0"         \
@@ -61,10 +48,6 @@
 /* Enable LCD and reserve 512KB from top of memory*/
 #define CONFIG_SYS_MEM_TOP_HIDE                0x80000
 
-#define CONFIG_BMP_16BPP
-#define CONFIG_BMP_24BPP
-#define CONFIG_BMP_32BPP
-
 /* FPGA programming support */
 #define CONFIG_FPGA_STRATIX_V
 
@@ -95,7 +78,6 @@
 
 /* SPL */
 /* Defines for SPL */
-#define CONFIG_SPL_TEXT_BASE           0x40004030
 #define CONFIG_SPL_MAX_SIZE            ((128 << 10) - 0x4030)
 
 #define CONFIG_SPL_BSS_START_ADDR      (0x40000000 + (128 << 10))
@@ -108,10 +90,6 @@
 #define CONFIG_SPL_STACK               (0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE                (CONFIG_SPL_STACK + 4)
 
-/* SPL related SPI defines */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x1a000
-#define CONFIG_SYS_U_BOOT_OFFS         CONFIG_SYS_SPI_U_BOOT_OFFS
-
 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
 #define CONFIG_DDR_FIXED_SIZE          (2 << 20)       /* 2GiB */