/*
* High Level Configuration Options
*/
-#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
#include <asm/arch/tegra.h> /* get chip and board defs */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE 115200
/* turn on command-line edit/hist/auto */
-#define CONFIG_COMMAND_HISTORY
+#define CONFIG_CMDLINE_EDITING
/*
* Increasing the size of the IO buffer as default nfsargs size is more
*/
#define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */
/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 64 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
+#ifndef CONFIG_ARM64
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
+#endif
-#define CONFIG_CMD_ENTERRCM
-
+#ifndef CONFIG_ARM64
/* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
CONFIG_SPL_TEXT_BASE)
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
+#endif
/* Misc utility code */
#define CONFIG_BOUNCE_BUFFER
-#define CONFIG_CRC32_VERIFY
#ifndef CONFIG_SPL_BUILD
#include <config_distro_defaults.h>
-#define CONFIG_FAT_WRITE
#endif
#endif /* _TEGRA_COMMON_H_ */