Merge tag 'u-boot-nand-20230417' of https://source.denx.de/u-boot/custodians/u-boot...

[platform/kernel/u-boot.git] / include / configs / sunxi-common.h

diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index fe90d55..d2d70f0 100644 (file)
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -16,21 +16,19 @@
 #include <linux/stringify.h>
 
 /* Serial & console */
-#define CONFIG_SYS_NS16550_SERIAL
 /* ns16550 reg in the low bits of cpu reg */
 #ifdef CONFIG_MACH_SUNIV
 /* suniv doesn't have apb2 and uart is connected to apb1 */
-#define CONFIG_SYS_NS16550_CLK         100000000
+#define CFG_SYS_NS16550_CLK            100000000
 #else
-#define CONFIG_SYS_NS16550_CLK         24000000
+#define CFG_SYS_NS16550_CLK            24000000
 #endif
-#ifndef CONFIG_DM_SERIAL
-# define CONFIG_SYS_NS16550_REG_SIZE   -4
-# define CONFIG_SYS_NS16550_COM1               SUNXI_UART0_BASE
-# define CONFIG_SYS_NS16550_COM2               SUNXI_UART1_BASE
-# define CONFIG_SYS_NS16550_COM3               SUNXI_UART2_BASE
-# define CONFIG_SYS_NS16550_COM4               SUNXI_UART3_BASE
-# define CONFIG_SYS_NS16550_COM5               SUNXI_R_UART_BASE
+#if !CONFIG_IS_ENABLED(DM_SERIAL)
+# define CFG_SYS_NS16550_COM1          SUNXI_UART0_BASE
+# define CFG_SYS_NS16550_COM2          SUNXI_UART1_BASE
+# define CFG_SYS_NS16550_COM3          SUNXI_UART2_BASE
+# define CFG_SYS_NS16550_COM4          SUNXI_UART3_BASE
+# define CFG_SYS_NS16550_COM5          SUNXI_R_UART_BASE
 #endif
 
 /* CPU */
@@ -44,13 +42,13 @@
  */
 #ifdef CONFIG_MACH_SUN9I
 #define SDRAM_OFFSET(x) 0x2##x
-#define CONFIG_SYS_SDRAM_BASE          0x20000000
+#define CFG_SYS_SDRAM_BASE             0x20000000
 #elif defined(CONFIG_MACH_SUNIV)
 #define SDRAM_OFFSET(x) 0x8##x
-#define CONFIG_SYS_SDRAM_BASE          0x80000000
+#define CFG_SYS_SDRAM_BASE             0x80000000
 #else
 #define SDRAM_OFFSET(x) 0x4##x
-#define CONFIG_SYS_SDRAM_BASE          0x40000000
+#define CFG_SYS_SDRAM_BASE             0x40000000
 /* V3s do not have enough memory to place code at 0x4a000000 */
 #endif
 
@@ -64,34 +62,19 @@
  * is known yet.
  * H6 has SRAM A1 at 0x00020000.
  */
-#define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SUNXI_SRAM_ADDRESS
+#define CFG_SYS_INIT_RAM_ADDR  CONFIG_SUNXI_SRAM_ADDRESS
 /* FIXME: this may be larger on some SoCs */
-#define CONFIG_SYS_INIT_RAM_SIZE       0x8000 /* 32 KiB */
+#define CFG_SYS_INIT_RAM_SIZE  0x8000 /* 32 KiB */
 
-#define PHYS_SDRAM_0                   CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_0                   CFG_SYS_SDRAM_BASE
 #define PHYS_SDRAM_0_SIZE              0x80000000 /* 2 GiB */
 
-#ifdef CONFIG_NAND_SUNXI
-#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
-#define CONFIG_SYS_MAX_NAND_DEVICE 8
-#endif
-
-/* mmc config */
-#define CONFIG_MMC_SUNXI_SLOT          0
-
-#define CONFIG_SYS_MMC_MAX_DEVICE      4
-
 /*
  * Miscellaneous configurable options
  */
 
-/* standalone support */
-#define CONFIG_STANDALONE_LOAD_ADDR    CONFIG_SYS_LOAD_ADDR
-
 /* FLASH and environment organization */
 
-#define CONFIG_SYS_MONITOR_LEN         (768 << 10)     /* 768 KiB */
-
 /*
  * We cannot use expressions here, because expressions won't be evaluated in
  * autoconf.mk.
@@ -105,7 +88,7 @@
 #endif /* !CONFIG_ARM64 */
 #elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
 #ifdef CONFIG_MACH_SUN50I_H616
-#define LOW_LEVEL_SRAM_STACK           0x58000
+#define LOW_LEVEL_SRAM_STACK           0x52a00         /* below FEL buffers */
 #else
 /* end of SRAM A2 on H6 for now */
 #define LOW_LEVEL_SRAM_STACK           0x00118000
@@ -301,7 +284,7 @@
        "stdin=serial\0"
 #endif
 
-#ifdef CONFIG_DM_VIDEO
+#ifdef CONFIG_VIDEO
 #define CONSOLE_STDOUT_SETTINGS \
        "stdout=serial,vidconsole\0" \
        "stderr=serial,vidconsole\0"
@@ -335,7 +318,7 @@
 #define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
 #endif
 
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
        CONSOLE_ENV_SETTINGS \
        MEM_LAYOUT_ENV_SETTINGS \
        MEM_LAYOUT_ENV_EXTRA_SETTINGS \