+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
*
* Tom Cubie <tangliang@allwinnertech.com>
*
* Configuration settings for the Allwinner sunxi series of boards.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SUNXI_COMMON_CONFIG_H
# define CONFIG_MACH_TYPE_COMPAT_REV 1
#endif
-/*
- * High Level Configuration Options
- */
-#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64)
-#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
+#ifdef CONFIG_ARM64
+#define CONFIG_SYS_BOOTM_LEN (32 << 20)
#endif
/* Serial & console */
#endif
/* CPU */
-#define CONFIG_TIMER_CLK_FREQ 24000000
+#define COUNTER_FREQUENCY 24000000
/*
* The DRAM Base differs between some models. We cannot use macros for the
#define SDRAM_OFFSET(x) 0x2##x
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
-#define CONFIG_SYS_TEXT_BASE 0x2a000000
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
* since it needs to fit in with the other values. By also #defining it
* we get warnings if the Kconfig value mismatches. */
#define SDRAM_OFFSET(x) 0x4##x
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
-#define CONFIG_SYS_TEXT_BASE 0x4a000000
+/* V3s do not have enough memory to place code at 0x4a000000 */
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
* since it needs to fit in with the other values. By also #defining it
* we get warnings if the Kconfig value mismatches. */
#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
-#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
/*
* The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
* slightly bigger. Note that it is possible to map the first 32 KiB of the
* A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
* undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
* the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
+ * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
+ * is known yet.
+ * H6 has SRAM A1 at 0x00020000.
*/
-#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
-#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
-#else
-#define CONFIG_SYS_INIT_RAM_ADDR 0x0
-#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
-#endif
+#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
+/* FIXME: this may be larger on some SoCs */
+#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
#ifdef CONFIG_AHCI
-#define CONFIG_LIBATA
-#define CONFIG_SCSI_AHCI
-#define CONFIG_SCSI_AHCI_PLAT
-#define CONFIG_SUNXI_AHCI
#define CONFIG_SYS_64BIT_LBA
-#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
-#define CONFIG_SYS_SCSI_MAX_LUN 1
-#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
- CONFIG_SYS_SCSI_MAX_LUN)
-#define CONFIG_SCSI
#endif
#define CONFIG_SETUP_MEMORY_TAGS
/* mmc config */
#ifdef CONFIG_MMC
#define CONFIG_MMC_SUNXI_SLOT 0
-#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
+#endif
+
+#if defined(CONFIG_ENV_IS_IN_MMC)
+
+#ifdef CONFIG_ARM64
+/*
+ * This is actually (CONFIG_ENV_OFFSET -
+ * (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)), but the value will be used
+ * directly in a makefile, without the preprocessor expansion.
+ */
+#define CONFIG_BOARD_SIZE_LIMIT 0x7e000
+#endif
+
+#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
+/* If we have two devices (most likely eMMC + MMC), favour the eMMC */
+#define CONFIG_SYS_MMC_ENV_DEV 1
+#else
+/* Otherwise, use the only device we have */
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#endif
#define CONFIG_SYS_MMC_MAX_DEVICE 4
#endif
+#ifndef CONFIG_MACH_SUN8I_V3S
/* 64MB of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
+#else
+/* 2MB of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
+#endif
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* standalone support */
#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
-/* baudrate */
-#define CONFIG_BAUDRATE 115200
-
-/* The stack sizes are set up in start.S using the settings below */
-#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
-
/* FLASH and environment organization */
-#define CONFIG_SYS_NO_FLASH
-
#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
-#define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
-#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
-
-#define CONFIG_FAT_WRITE /* enable write access */
-
-#define CONFIG_SPL_FRAMEWORK
-
#ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */
#define CONFIG_SPL_BOARD_LOAD_IMAGE
#endif
-#if defined(CONFIG_MACH_SUN9I)
-#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
-#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* ? KiB on sun9i */
-#elif defined(CONFIG_MACH_SUN50I)
-#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
-#define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB on sun50i */
+/*
+ * We cannot use expressions here, because expressions won't be evaluated in
+ * autoconf.mk.
+ */
+#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
+#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
+#ifdef CONFIG_ARM64
+/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
+#define LOW_LEVEL_SRAM_STACK 0x00054000
#else
-#define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */
-#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */
+#define LOW_LEVEL_SRAM_STACK 0x00018000
+#endif /* !CONFIG_ARM64 */
+#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
+#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
+/* end of SRAM A2 on H6 for now */
+#define LOW_LEVEL_SRAM_STACK 0x00118000
+#else
+#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
+#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
#endif
-#ifndef CONFIG_ARM64
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
-#endif
+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
-#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
-/* FIXME: 40 KiB instead of 32 KiB ? */
-#define LOW_LEVEL_SRAM_STACK 0x00018000
-#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-#else
-/* end of 32 KiB in sram */
-#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
-#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-#endif
/* I2C */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
-#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
+#ifndef CONFIG_DM_I2C
+#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x7f
#endif
+#endif
#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
#define CONFIG_SYS_I2C_SOFT
defined CONFIG_SY8106A_POWER
#endif
-#ifndef CONFIG_CONS_INDEX
-#define CONFIG_CONS_INDEX 1 /* UART0 */
-#endif
-
#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
#if CONFIG_CONS_INDEX == 1
#ifdef CONFIG_MACH_SUN9I
/* GPIO */
#define CONFIG_SUNXI_GPIO
-#ifdef CONFIG_VIDEO
+#ifdef CONFIG_VIDEO_SUNXI
/*
* The amount of RAM to keep free at the top of RAM when relocating u-boot,
* to use as framebuffer. This must be a multiple of 4096.
*/
#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
-/* Do we want to initialize a simple FB? */
-#define CONFIG_VIDEO_DT_SIMPLEFB
-
-#define CONFIG_VIDEO_SUNXI
-
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_STD_TIMINGS
#define CONFIG_I2C_EDID
/* allow both serial and cfb console. */
/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
-#endif /* CONFIG_VIDEO */
+#endif /* CONFIG_VIDEO_SUNXI */
/* Ethernet support */
-#ifdef CONFIG_SUNXI_EMAC
-#define CONFIG_PHY_ADDR 1
-#define CONFIG_MII /* MII PHY management */
-#define CONFIG_PHYLIB
-#endif
-#ifdef CONFIG_SUNXI_GMAC
-#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
-#define CONFIG_PHY_ADDR 1
-#define CONFIG_MII /* MII PHY management */
+#ifdef CONFIG_SUN7I_GMAC
#define CONFIG_PHY_REALTEK
#endif
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_OHCI_NEW
-#define CONFIG_USB_OHCI_SUNXI
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
-#endif
-
-#ifdef CONFIG_USB_MUSB_SUNXI
-#define CONFIG_USB_MUSB_PIO_ONLY
-#endif
-
-#ifdef CONFIG_USB_MUSB_GADGET
-#define CONFIG_USB_FUNCTION_FASTBOOT
-#define CONFIG_USB_FUNCTION_MASS_STORAGE
-#endif
-
-#ifdef CONFIG_USB_FUNCTION_FASTBOOT
-#define CONFIG_CMD_FASTBOOT
-#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
-#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
-#define CONFIG_ANDROID_BOOT_IMAGE
-
-#define CONFIG_FASTBOOT_FLASH
-
-#ifdef CONFIG_MMC
-#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
-#endif
-#endif
-
-#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
#endif
#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_PREBOOT
-#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
-#endif
-
-#if !defined CONFIG_ENV_IS_IN_MMC && \
- !defined CONFIG_ENV_IS_IN_NAND && \
- !defined CONFIG_ENV_IS_IN_FAT && \
- !defined CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_IS_NOWHERE
#endif
-#define CONFIG_MISC_INIT_R
-
#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
#ifdef CONFIG_ARM64
/*
* Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
* Align the initrd to a 2MB page.
*/
+#define BOOTM_SIZE __stringify(0xa000000)
#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
* 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
* 1M script, 1M pxe and the ramdisk at the end.
*/
-
+#ifndef CONFIG_MACH_SUN8I_V3S
+#define BOOTM_SIZE __stringify(0xa000000)
#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
+#else
+/*
+ * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
+ * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
+ * 1M script, 1M pxe and the ramdisk at the end.
+ */
+#define BOOTM_SIZE __stringify(0x2e00000)
+#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
+#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
+#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
+#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
+#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
+#endif
#endif
#define MEM_LAYOUT_ENV_SETTINGS \
- "bootm_size=0xa000000\0" \
+ "bootm_size=" BOOTM_SIZE "\0" \
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
"fdt_addr_r=" FDT_ADDR_R "\0" \
"scriptaddr=" SCRIPT_ADDR_R "\0" \
"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
#ifdef CONFIG_MMC
-#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
-#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
+#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
+ BOOTENV_DEV_MMC(MMC, mmc, 0) \
+ BOOTENV_DEV_MMC(MMC, mmc, 1) \
+ "bootcmd_mmc_auto=" \
+ "if test ${mmc_bootdev} -eq 1; then " \
+ "run bootcmd_mmc1; " \
+ "run bootcmd_mmc0; " \
+ "elif test ${mmc_bootdev} -eq 0; then " \
+ "run bootcmd_mmc0; " \
+ "run bootcmd_mmc1; " \
+ "fi\0"
+
+#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
+ "mmc_auto "
+
+#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
#else
-#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
+#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#endif
#else
#define BOOT_TARGET_DEVICES_MMC(func)
-#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
#endif
#ifdef CONFIG_AHCI
#define BOOT_TARGET_DEVICES(func) \
func(FEL, fel, na) \
BOOT_TARGET_DEVICES_MMC(func) \
- BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
BOOT_TARGET_DEVICES_SCSI(func) \
BOOT_TARGET_DEVICES_USB(func) \
func(PXE, pxe, na) \
#define CONSOLE_STDOUT_SETTINGS \
"stdout=serial,vga\0" \
"stderr=serial,vga\0"
+#elif CONFIG_DM_VIDEO
+#define CONSOLE_STDOUT_SETTINGS \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
#else
#define CONSOLE_STDOUT_SETTINGS \
"stdout=serial\0" \
"stderr=serial\0"
#endif
+#ifdef CONFIG_MTDIDS_DEFAULT
+#define SUNXI_MTDIDS_DEFAULT \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
+#else
+#define SUNXI_MTDIDS_DEFAULT
+#endif
+
+#ifdef CONFIG_MTDPARTS_DEFAULT
+#define SUNXI_MTDPARTS_DEFAULT \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
+#else
+#define SUNXI_MTDPARTS_DEFAULT
+#endif
+
+#define PARTS_DEFAULT \
+ "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \
+ "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \
+ "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \
+ "name=system,size=-,uuid=${uuid_gpt_system};"
+
+#define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b"
+
+#ifdef CONFIG_ARM64
+#define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae"
+#else
+#define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3"
+#endif
+
#define CONSOLE_ENV_SETTINGS \
CONSOLE_STDIN_SETTINGS \
CONSOLE_STDOUT_SETTINGS
+#ifdef CONFIG_ARM64
+#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#else
+#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#endif
+
#define CONFIG_EXTRA_ENV_SETTINGS \
CONSOLE_ENV_SETTINGS \
MEM_LAYOUT_ENV_SETTINGS \
DFU_ALT_INFO_RAM \
- "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
+ "fdtfile=" FDTFILE "\0" \
"console=ttyS0,115200\0" \
+ SUNXI_MTDIDS_DEFAULT \
+ SUNXI_MTDPARTS_DEFAULT \
+ "uuid_gpt_esp=" UUID_GPT_ESP "\0" \
+ "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \
+ "partitions=" PARTS_DEFAULT "\0" \
BOOTCMD_SUNXI_COMPAT \
BOOTENV