powerpc: Cleanup BOOTFLAG_* references

[platform/kernel/u-boot.git] / include / configs / stxxtc.h

diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h
index 147233d..b9739ff 100644 (file)
--- a/include/configs/stxxtc.h
+++ b/include/configs/stxxtc.h
@@ -38,6 +38,8 @@
 #define CONFIG_MPC875          1       /* This is a MPC875 CPU         */
 #define CONFIG_STXXTC          1       /* ...on a STx XTc  board       */
 
+#define        CONFIG_SYS_TEXT_BASE    0x40F00000
+
 #define        CONFIG_8xx_CONS_SMC1    1       /* Console is on SMC1           */
 #undef CONFIG_8xx_CONS_SMC2
 #undef CONFIG_8xx_CONS_NONE
@@ -118,7 +120,6 @@
 
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_MII
-#define CONFIG_CMD_NAND
 #define CONFIG_CMD_NFS
 #define CONFIG_CMD_PING
 
@@ -431,14 +432,6 @@
                         MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 |   \
                         MAMR_RLFA_1X    | MAMR_WLFA_1X    | MAMR_TLFA_4X)
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define        BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
-#define BOOTFLAG_WARM  0x02            /* Software reboot                      */
-
 #define CONFIG_LAST_STAGE_INIT         /* needed to reset the damn phys */
 
 /****************************************************************/
@@ -446,90 +439,9 @@
 #define NAND_SIZE      0x00010000      /* 64K */
 #define NAND_BASE      0xF1000000
 
-/****************************************************************/
-
-/* NAND */
-#define CONFIG_NAND_LEGACY
-#define CONFIG_SYS_NAND_BASE           NAND_BASE
-#define CONFIG_MTD_NAND_ECC_JFFS2
-#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_MTD_NAND_UNSAFE
-
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-#undef NAND_NO_RB
-
-#define SECTORSIZE             512
-#define ADDR_COLUMN            1
-#define ADDR_PAGE              2
-#define ADDR_COLUMN_PAGE       3
-#define NAND_ChipID_UNKNOWN    0x00
-#define NAND_MAX_FLOORS                1
-
-/* ALE = PC15, CLE = PB23, CE = PA7, F_RY_BY = PA6 */
-#define NAND_DISABLE_CE(nand) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat) |=  (1 << (15 - 7)); \
-       } while(0)
-
-#define NAND_ENABLE_CE(nand) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat) &= ~(1 << (15 - 7)); \
-       } while(0)
-
-#define NAND_CTL_CLRALE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat) &= ~(1 << (15 - 15)); \
-       } while(0)
-
-#define NAND_CTL_SETALE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat) |=  (1 << (15 - 15)); \
-       } while(0)
-
-#define NAND_CTL_CLRCLE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdat) &= ~(1 << (31 - 23)); \
-       } while(0)
-
-#define NAND_CTL_SETCLE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdat) |=  (1 << (31 - 23)); \
-       } while(0)
-
-#ifndef NAND_NO_RB
-#define NAND_WAIT_READY(nand) \
-       do { \
-               int _tries = 0; \
-               while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat & (1 << (15 - 6))) == 0) \
-                       if (++_tries > 100000) \
-                               break; \
-       } while (0)
-#else
-#define NAND_WAIT_READY(nand) udelay(12)
-#endif
-
-#define WRITE_NAND_COMMAND(d, adr) \
-       do { \
-               *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
-       } while(0)
-
-#define WRITE_NAND_ADDRESS(d, adr) \
-       do { \
-               *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
-       } while(0)
-
-#define WRITE_NAND(d, adr) \
-       do { \
-               *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
-       } while(0)
-
-#define READ_NAND(adr) \
-       ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
-
 /*****************************************************************************/
 
 #define CONFIG_SYS_DIRECT_FLASH_TFTP
-#define CONFIG_SYS_DIRECT_NAND_TFTP
 
 /*****************************************************************************/
 
@@ -591,7 +503,6 @@ typedef unsigned int led_id_t;
 /* pass open firmware flattened device tree */
 #define CONFIG_OF_LIBFDT       1
 
-#define OF_CPU                 "PowerPC,MPC870@0"
 #define OF_TBCLK               (MPC8XX_HZ / 16)
 
 #endif /* __CONFIG_H */