video: Moving mx3fb.c to CONFIG_VIDEO

[platform/kernel/u-boot.git] / include / configs / stxssa.h

diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index 6ea5807..3d385b4 100644 (file)
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -43,7 +43,7 @@
 #define CONFIG_STXSSA          1       /* Silicon Tx GPPP SSA board specific*/
 #define CONFIG_MPC8560         1
 
-#define        CONFIG_SYS_TEXT_BASE    0xFFFC0000
+#define        CONFIG_SYS_TEXT_BASE    0xFFF80000
 
 #define CONFIG_PCI                     /* PCI ethernet support */
 #define CONFIG_TSEC_ENET               /* tsec ethernet support*/
@@ -121,12 +121,10 @@
 
 #ifdef CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_CCSRBAR_DEFAULT     0x40000000      /* CCSRBAR by BDI cfg   */
-#else
-#define CONFIG_SYS_CCSRBAR_DEFAULT     0xff700000      /* CCSRBAR Default      */
 #endif
-#define CONFIG_SYS_CCSRBAR             0xe0000000      /* relocated CCSRBAR    */
-#define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR    */
+
+#define CONFIG_SYS_CCSRBAR             0xe0000000
+#define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
 #define CONFIG_FSL_DDR1
@@ -135,7 +133,6 @@
 #undef CONFIG_FSL_DDR_INTERACTIVE
 
 #undef CONFIG_DDR_ECC                  /* only for ECC DDR module */
-#undef CONFIG_DDR_DLL                  /* possible DLL fix needed */
 #define CONFIG_DDR_2T_TIMING           /* Sets the 2T timing bit */
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
@@ -167,10 +164,9 @@
 
 #define CONFIG_SYS_INIT_RAM_LOCK       1
 #define CONFIG_SYS_INIT_RAM_ADDR       0x60000000      /* Initial RAM address  */
-#define CONFIG_SYS_INIT_RAM_END        0x4000          /* End of used area in RAM */
+#define CONFIG_SYS_INIT_RAM_SIZE       0x4000          /* Size of used area in RAM */
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128             /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_LEN         (256 * 1024)    /* Reserve 256 kB for Mon */
@@ -196,6 +192,11 @@
 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 #endif
 
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT               1
+#define CONFIG_OF_BOARD_SETUP          1
+#define CONFIG_OF_STDOUT_VIA_ALIAS     1
+
 /*
  * I2C
  */
@@ -238,7 +239,6 @@
 
 #if defined(CONFIG_PCI)                        /* PCI Ethernet card */
 #define CONFIG_MPC85XX_PCI2    1
-#define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
 #define CONFIG_EEPRO100
@@ -257,10 +257,6 @@
 
 #if defined(CONFIG_TSEC_ENET)
 
-#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI       1
-#endif
-
 #define CONFIG_MII             1       /* MII PHY management           */
 
 #define CONFIG_TSEC1   1