#define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
/* spi not partitions */
-#define CONFIG_JFFS2_CMDLINE
#define CONFIG_JFFS2_DEV "nor0"
/* Timer */
#define CONFIG_ENV_IS_IN_SPI_FLASH 1
#endif
-#undef CONFIG_ENV_OVERWRITE
-
/* Cache Configuration */
#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \