*/
#define CONFIG_SYS_HZ 1000
+/* PSCI support */
+#define CONFIG_ARMV7_PSCI_1_0
+#define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE
+#define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE
+
/*
* malloc() pool size
*/
#define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
-#define CONFIG_NR_DRAM_BANKS 1
-
/*
* Console I/O buffer size
*/