+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2015
* Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MISC_INIT_R
-
#define CONFIG_SYS_FLASH_BASE 0x08000000
#define CONFIG_SYS_INIT_SP_ADDR 0x10010000
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_SYS_DCACHE_OFF
-
/*
* Configuration of the external SDRAM memory
*/
-#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_RAM_CS 1
-#define CONFIG_SYS_RAM_FREQ_DIV 2
-#define CONFIG_SYS_RAM_BASE 0xD0000000
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE
-#define CONFIG_SYS_LOAD_ADDR 0xD0400000
-#define CONFIG_LOADADDR 0xD0400000
+#define CONFIG_SYS_LOAD_ADDR 0x90400000
+#define CONFIG_LOADADDR 0x90400000
#define CONFIG_SYS_MAX_FLASH_SECT 12
#define CONFIG_SYS_MAX_FLASH_BANKS 2
#define CONFIG_STM32_FLASH
-#define CONFIG_SYS_CLK_FREQ 180000000 /* 180 MHz */
-
#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
#define CONFIG_CMDLINE_TAG