Merge with /home/hs/SC3/u-boot

[kernel/u-boot.git] / include / configs / solidcard3.h

diff --git a/include/configs/SOLIDCARD3.h b/include/configs/solidcard3.h
similarity index 90%
rename from include/configs/SOLIDCARD3.h
rename to include/configs/solidcard3.h
index 16e68b5..867cba5 100644 (file)
--- a/include/configs/SOLIDCARD3.h
+++ b/include/configs/solidcard3.h
@@ -94,7 +94,7 @@
  * define CONFIG_BAUDRATE to the baudrate value you want to use as default
  */
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3 /* autoboot after 3 seconds         */
+#define CONFIG_BOOTDELAY       3 /* autoboot after 3 seconds         */
 
 #define CONFIG_SILENT_CONSOLE  1       /* enable silent startup */
 #define CFG_DEVICE_NULLDEV     1       /* include nulldev device       */
@@ -137,7 +137,7 @@
 #define CONFIG_PHY_ADDR 1      /* the connected Phy defaults to address 1 */
 
 #define CONFIG_COMMANDS          \
-           (CONFIG_CMD_DFL     | \
+          (CONFIG_CMD_DFL      | \
                                CFG_CMD_PCI     | \
                                CFG_CMD_IRQ     | \
                                CFG_CMD_NET | \
@@ -183,8 +183,8 @@
  * Consider the OPB clock! If it get lower the BASE_BAUD must be lower to
  * (see 405GP datasheet for descritpion)
  */
-#undef  CFG_EXT_SERIAL_CLOCK           /* external serial clock */
-#undef  CFG_405_UART_ERRATA_59         /* 405GP/CR Rev. D silicon */
+#undef CFG_EXT_SERIAL_CLOCK            /* external serial clock */
+#undef CFG_405_UART_ERRATA_59          /* 405GP/CR Rev. D silicon */
 #define CFG_BASE_BAUD          921600  /* internal clock */
 
 /* The following table includes the supported baudrates */
@@ -201,7 +201,7 @@
  *-----------------------------------------------------------------------
  */
 #define  CONFIG_HARD_I2C               /* I2C with hardware support    */
-#undef  CONFIG_SOFT_I2C                        /* I2C bit-banged               */
+#undef CONFIG_SOFT_I2C                 /* I2C bit-banged               */
 
 #define I2C_INIT
 #define I2C_ACTIVE 0
@@ -217,26 +217,26 @@
  * PCI stuff
  *-----------------------------------------------------------------------
  */
-#define PCI_HOST_ADAPTER 0             /* configure ar pci adapter     */
-#define PCI_HOST_FORCE  1              /* configure as pci host        */
-#define PCI_HOST_AUTO   2              /* detected via arbiter enable  */
+#define PCI_HOST_ADAPTER 0             /* configure ar pci adapter     */
+#define PCI_HOST_FORCE 1               /* configure as pci host        */
+#define PCI_HOST_AUTO  2               /* detected via arbiter enable  */
 
-#define CONFIG_PCI                     /* include pci support          */
-#define CONFIG_PCI_HOST        PCI_HOST_FORCE  /* select pci host function     */
-#define CONFIG_PCI_PNP                 /* do pci plug-and-play         */
-                                       /* resource configuration       */
+#define CONFIG_PCI                     /* include pci support          */
+#define CONFIG_PCI_HOST        PCI_HOST_FORCE  /* select pci host function     */
+#define CONFIG_PCI_PNP                 /* do pci plug-and-play         */
+                                       /* resource configuration       */
 
 /* If you want to see, whats connected to your PCI bus */
 /* #define CONFIG_PCI_SCAN_SHOW */
 
-#define CFG_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!!      */
-#define CFG_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!!      */
-#define CFG_PCI_PTM1LA  0x00000000     /* point to sdram               */
-#define CFG_PCI_PTM1MS  0x80000001     /* 2GB, enable hard-wired to 1  */
-#define CFG_PCI_PTM1PCI 0x00000000     /* Host: use this pci address   */
-#define CFG_PCI_PTM2LA  0x00000000     /* disabled                     */
-#define CFG_PCI_PTM2MS  0x00000000     /* disabled                     */
-#define CFG_PCI_PTM2PCI 0x04000000     /* Host: use this pci address   */
+#define CFG_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!!      */
+#define CFG_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!!      */
+#define CFG_PCI_PTM1LA 0x00000000      /* point to sdram               */
+#define CFG_PCI_PTM1MS 0x80000001      /* 2GB, enable hard-wired to 1  */
+#define CFG_PCI_PTM1PCI 0x00000000     /* Host: use this pci address   */
+#define CFG_PCI_PTM2LA 0x00000000      /* disabled                     */
+#define CFG_PCI_PTM2MS 0x00000000      /* disabled                     */
+#define CFG_PCI_PTM2PCI 0x04000000     /* Host: use this pci address   */
 
 /*-----------------------------------------------------------------------
  * External peripheral base address
@@ -244,8 +244,8 @@
  */
 #if !(CONFIG_COMMANDS & CFG_CMD_IDE)
 
-#undef  CONFIG_IDE_LED                 /* no led for ide supported     */
-#undef  CONFIG_IDE_RESET               /* no reset for ide supported   */
+#undef CONFIG_IDE_LED                  /* no led for ide supported     */
+#undef CONFIG_IDE_RESET                /* no reset for ide supported   */
 
 /*-----------------------------------------------------------------------
  * IDE/ATA stuff
@@ -254,9 +254,9 @@
 #else /* !(CONFIG_COMMANDS & CFG_CMD_IDE) */
 #define CONFIG_START_IDE       1       /* check, if use IDE */
 
-#undef  CONFIG_IDE_8xx_DIRECT          /* no pcmcia interface required */
-#undef  CONFIG_IDE_LED                 /* no led for ide supported     */
-#undef  CONFIG_IDE_RESET               /* no reset for ide supported   */
+#undef CONFIG_IDE_8xx_DIRECT           /* no pcmcia interface required */
+#undef CONFIG_IDE_LED                  /* no led for ide supported     */
+#undef CONFIG_IDE_RESET                /* no reset for ide supported   */
 
 #define        CONFIG_ATAPI
 #define        CONFIG_DOS_PARTITION
@@ -345,7 +345,7 @@ extern unsigned long offsetOfEnvironment;
  */
 #define CFG_BOOTMAPSZ          (8 << 20)       /* Initial Memory map for Linux */
 /*-----------------------------------------------------------------------
- * FLASH organization // FIXME: lookup in datasheet
+ * FLASH organization ## FIXME: lookup in datasheet
  */
 #define CFG_MAX_FLASH_BANKS    2       /* max number of memory banks           */
 #define CFG_MAX_FLASH_SECT     256     /* max number of sectors on one chip    */
@@ -360,8 +360,8 @@ extern unsigned long offsetOfEnvironment;
 #define CFG_ENV_IS_IN_FLASH    1
 #if CFG_ENV_IS_IN_FLASH
        #define CFG_ENV_OFFSET          0x00000000  /* Offset of Environment Sector in bottom type */
-       #define CFG_ENV_SIZE            0x4000      /* Total Size of Environment Sector */
-       #define CFG_ENV_SECT_SIZE       0x4000      /* see README - env sector total size       */
+       #define CFG_ENV_SIZE            0x4000      /* Total Size of Environment Sector */
+       #define CFG_ENV_SECT_SIZE       0x4000      /* see README - env sector total size       */
 #endif
 /* let us changing anything in our environment */
 #define CONFIG_ENV_OVERWRITE
@@ -421,21 +421,21 @@ extern unsigned long offsetOfEnvironment;
 
 #undef CFG_INIT_DCACHE_CS
 /* Where the internal SRAM starts */
-#define CFG_INIT_RAM_ADDR       CFG_OCM_DATA_ADDR
+#define CFG_INIT_RAM_ADDR      CFG_OCM_DATA_ADDR
 /* Where the internal SRAM ends (only offset) */
-#define CFG_INIT_RAM_END        0x0F00
+#define CFG_INIT_RAM_END       0x0F00
 
 /*
 
  CFG_INIT_RAM_ADDR ------> ------------ lower address
-                           |          |
-                           |  ^       |
-                           |  |       |
-                           |  | Stack |
+                          |          |
+                          |  ^       |
+                          |  |       |
+                          |  | Stack |
  CFG_GBL_DATA_OFFSET ----> ------------
-                           |          |
-                           | 64 Bytes |
-                           |          |
+                          |          |
+                          | 64 Bytes |
+                          |          |
  CFG_INIT_RAM_END  ------> ------------ higher address
   (offset only)