+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2008
* Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
* Copyright 2004 Freescale Semiconductor.
* (C) Copyright 2002,2003 Motorola,Inc.
* Xianghua Xiao <X.Xiao@motorola.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/*
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
-
/*
* Only possible on E500 Version 2 or newer cores.
*/
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
/* DDR Setup */
-#undef CONFIG_FSL_DDR_INTERACTIVE
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#define CONFIG_DDR_SPD
#define CONFIG_SYS_BR1_PRELIM 0xfc001001 /* port size 16bit */
#define CONFIG_SYS_OR1_PRELIM 0xfe000030 /* 32MB Flash */
-#define CONFIG_SYS_FLASH_CFI /* flash is CFI compat. */
-#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver*/
-
#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 256 /* sectors per device */
#undef CONFIG_SYS_FLASH_CHECKSUM
#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
/* I2C RTC */
-#define CONFIG_RTC_RX8025 /* Use Epson rx8025 rtc via i2c */
#define CONFIG_SYS_I2C_RTC_ADDR 0x32 /* at address 0x32 */
/* I2C W83782G HW-Monitoring IC */
#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
-#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_TSEC1 1
#define CONFIG_TSEC1_NAME "TSEC0"
#define CONFIG_TSEC3 1
#define CONFIG_LOADADDR 200000 /* default addr for tftp & bootm*/
-
-#define CONFIG_PREBOOT "echo;" \
- "echo Welcome on the ABB Socrates Board;" \
- "echo"
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consdev=ttyS0\0" \