#define CFG_OR1_PRELIM 0xfe000ff7 /* 32MB Flash */
#define CFG_FLASH_CFI /* flash is CFI compat. */
-#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver*/
+#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver*/
#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector */
#define CFG_MAX_FLASH_BANKS 2 /* number of banks */
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256kB for Mon*/
-#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
+#define CFG_MALLOC_LEN (256 * 1024) /* Reserved for malloc */
/* Serial Port */
#define CFG_EEPROM_PAGE_WRITE_ENABLE /* necessary for the LM75 chip */
#define CFG_EEPROM_PAGE_WRITE_BITS 4
-/* RapidIO MMU */
-#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */
-#define CFG_RIO_MEM_PHYS CFG_RIO_MEM_BASE
-#define CFG_RIO_MEM_SIZE 0x20000000 /* 128M */
-
/*
* General PCI
* Memory space is mapped 1-1.
#define CONFIG_DOS_PARTITION 1
#define CONFIG_USB_STORAGE 1
+/* FPGA and NAND */
+#define CFG_FPGA_BASE 0xc0000000
+#define CFG_BR3_PRELIM 0xc0001881 /* UPMA, 32-bit */
+#define CFG_OR3_PRELIM 0xfff00000 /* 1 MB */
+
+#define CFG_NAND_BASE (CFG_FPGA_BASE + 0x70)
+#define CFG_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CONFIG_CMD_NAND
+
#endif /* __CONFIG_H */