drivers/mtd: Move conditional compilation to Makefile

[platform/kernel/u-boot.git] / include / configs / socrates.h

diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 5d37383..8a64942 100644 (file)
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -139,7 +139,7 @@
 #define CFG_OR1_PRELIM         0xfe000ff7      /* 32MB Flash           */
 
 #define CFG_FLASH_CFI                          /* flash is CFI compat. */
-#define CFG_FLASH_CFI_DRIVER                   /* Use common CFI driver*/
+#define CONFIG_FLASH_CFI_DRIVER                        /* Use common CFI driver*/
 #define CFG_FLASH_EMPTY_INFO           /* print 'E' for empty sector   */
 
 #define CFG_MAX_FLASH_BANKS    2               /* number of banks      */
@@ -165,7 +165,7 @@
 #define CFG_INIT_SP_OFFSET     CFG_GBL_DATA_OFFSET
 
 #define CFG_MONITOR_LEN                (256 * 1024)    /* Reserve 256kB for Mon*/
-#define CFG_MALLOC_LEN         (128 * 1024)    /* Reserved for malloc  */
+#define CFG_MALLOC_LEN         (256 * 1024)    /* Reserved for malloc  */
 
 /* Serial Port */
 
@@ -206,10 +206,15 @@
 #define CONFIG_RTC_RX8025              /* Use Epson rx8025 rtc via i2c */
 #define CFG_I2C_RTC_ADDR       0x32    /* at address 0x32              */
 
-/* RapidIO MMU */
-#define CFG_RIO_MEM_BASE       0xc0000000      /* base address         */
-#define CFG_RIO_MEM_PHYS       CFG_RIO_MEM_BASE
-#define CFG_RIO_MEM_SIZE       0x20000000      /* 128M                 */
+/* I2C temp sensor */
+/* Socrates uses Maxim's       DS75, which is compatible with LM75 */
+#define CONFIG_DTT_LM75                1
+#define CONFIG_DTT_SENSORS     {4}             /* Sensor addresses     */
+#define CFG_DTT_MAX_TEMP       125
+#define CFG_DTT_LOW_TEMP       -55
+#define CFG_DTT_HYSTERESIS     3
+#define CFG_EEPROM_PAGE_WRITE_ENABLE   /* necessary for the LM75 chip */
+#define CFG_EEPROM_PAGE_WRITE_BITS     4
 
 /*
  * General PCI
@@ -217,7 +222,8 @@
  */
 #define CFG_PCI_PHYS           0x80000000      /* 1G PCI TLB */
 
-
+/* PCI is clocked by the external source at 33 MHz */
+#define CONFIG_PCI_CLK_FREQ    33000000
 #define CFG_PCI1_MEM_BASE      0x80000000
 #define CFG_PCI1_MEM_PHYS      CFG_PCI1_MEM_BASE
 #define CFG_PCI1_MEM_SIZE      0x20000000      /* 512M                 */
@@ -226,15 +232,8 @@
 #define CFG_PCI1_IO_SIZE       0x01000000      /* 16M                  */
 
 #if defined(CONFIG_PCI)
-
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play         */
-
-#define CONFIG_EEPRO100
-#undef CONFIG_TULIP
-
 #undef CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
-#define CFG_PCI_SUBSYS_VENDORID 0x1057 /* Motorola                     */
-
 #endif /* CONFIG_PCI */
 
 
@@ -293,14 +292,14 @@
 
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_DHCP
-#undef CONFIG_CMD_DTT
+#define CONFIG_CMD_DTT
 #undef CONFIG_CMD_EEPROM
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NFS
 #define CONFIG_CMD_PING
-#undef CONFIG_CMD_RTC
 #define CONFIG_CMD_SNTP
+#define CONFIG_CMD_USB
 
 
 #if defined(CONFIG_PCI)
@@ -360,9 +359,10 @@
 #undef CONFIG_BOOTARGS         /* the boot command will set bootargs   */
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
-       "bootfile=/tftpboot/socrates/uImage\0"                          \
+       "bootfile=$hostname/uImage\0"                                   \
        "netdev=eth0\0"                                                 \
        "consdev=ttyS0\0"                                               \
+       "hostname=socrates\0"                                           \
        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
                "nfsroot=$serverip:$rootpath\0"                         \
        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
@@ -379,15 +379,15 @@
                "tftp ${fdt_addr_r} ${fdt_file}; "                      \
                "run nfsargs addip addcons;"                            \
                "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
-       "fdt_file=socrates/socrates.dtb\0"                                      \
+       "fdt_file=$hostname/socrates.dtb\0"                             \
        "fdt_addr_r=B00000\0"                                           \
        "fdt_addr=FC1E0000\0"                                           \
-       "rootpath=/opt/eldk/ppc_85xx\0"                                 \
+       "rootpath=/opt/eldk/ppc_85xxDP\0"                               \
        "kernel_addr=FC000000\0"                                        \
        "kernel_addr_r=200000\0"                                        \
        "ramdisk_addr=FC200000\0"                                       \
        "ramdisk_addr_r=400000\0"                                       \
-       "load=tftp 100000 /tftpboot/$hostname/u-boot.bin\0"             \
+       "load=tftp 100000 $hostname/u-boot.bin\0"               \
        "update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;"   \
                "cp.b 100000 fffc0000 40000;"                           \
                "setenv filesize;saveenv\0"                             \
@@ -399,4 +399,24 @@
 #define CONFIG_OF_LIBFDT       1
 #define CONFIG_OF_BOARD_SETUP  1
 
+/* USB support */
+#define CONFIG_USB_OHCI_NEW            1
+#define CONFIG_PCI_OHCI                        1
+#define CONFIG_PCI_OHCI_DEVNO          3 /* Number in PCI list */
+#define CFG_USB_OHCI_MAX_ROOT_PORTS    15
+#define CFG_USB_OHCI_SLOT_NAME         "ohci_pci"
+#define CFG_OHCI_SWAP_REG_ACCESS       1
+#define CONFIG_DOS_PARTITION           1
+#define CONFIG_USB_STORAGE             1
+
+/* FPGA and NAND */
+#define CFG_FPGA_BASE                  0xc0000000
+#define CFG_BR3_PRELIM                 0xc0001881 /* UPMA, 32-bit */
+#define CFG_OR3_PRELIM                 0xfff00000  /* 1 MB */
+
+#define CFG_NAND_BASE                  (CFG_FPGA_BASE + 0x70)
+#define CFG_MAX_NAND_DEVICE            1
+#define NAND_MAX_CHIPS                 1
+#define CONFIG_CMD_NAND
+
 #endif /* __CONFIG_H */