/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */
-/* Booting Linux */
-#define CONFIG_LOADADDR 0x01000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
/* Ethernet on SoC (EMAC) */
#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
/* The PHY is autodetected, so no MII PHY address is needed here */
/* Enable SPI NOR flash reset, needed for SPI booting */
#define CONFIG_SPI_N25Q256A_RESET
-/*
- * Bootcounter
- */
-#define CONFIG_SYS_BOOTCOUNT_BE
-
/* Environment setting for SPI flash */
/* The rest of the configuration is shared */