Merge tag 'efi-2021-10-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
[platform/kernel/u-boot.git] / include / configs / socfpga_soc64_common.h
index 0e54601..a0453e5 100644 (file)
@@ -7,8 +7,8 @@
 #ifndef __CONFIG_SOCFPGA_SOC64_COMMON_H__
 #define __CONFIG_SOCFPGA_SOC64_COMMON_H__
 
-#include <asm/arch/base_addr_s10.h>
-#include <asm/arch/handoff_s10.h>
+#include <asm/arch/base_addr_soc64.h>
+#include <asm/arch/handoff_soc64.h>
 #include <linux/stringify.h>
 
 /*
@@ -20,8 +20,6 @@
 #define CONFIG_REMAKE_ELF
 /* sysmgr.boot_scratch_cold4 & 5 (64bit) will be used for PSCI_CPU_ON call */
 #define CPU_RELEASE_ADDR               0xFFD12210
-#define CONFIG_SYS_CACHELINE_SIZE      64
-#define CONFIG_SYS_MEM_RESERVE_SECURE  0       /* using OCRAM, not DDR */
 
 /*
  * U-Boot console configurations
@@ -43,7 +41,7 @@
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR  \
                                        + CONFIG_SYS_INIT_RAM_SIZE \
-                                       - S10_HANDOFF_SIZE)
+                                       - SOC64_HANDOFF_SIZE)
 #else
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_TEXT_BASE \
                                        + 0x100000)
@@ -194,7 +192,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
  * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB)
  *
  */
-#define CONFIG_SPL_TARGET              "spl/u-boot-spl.hex"
+#define CONFIG_SPL_TARGET              "spl/u-boot-spl-dtb.hex"
 #define CONFIG_SPL_MAX_SIZE            CONFIG_SYS_INIT_RAM_SIZE
 #define CONFIG_SPL_STACK               CONFIG_SYS_INIT_SP_ADDR
 #define CONFIG_SPL_BSS_MAX_SIZE                0x100000        /* 1 MB */