configs: Migrate CONFIG_SYS_MAX_FLASH_BANKS to Kconfig

[platform/kernel/u-boot.git] / include / configs / socfpga_soc64_common.h

diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index 1cfa190..8646dc2 100644 (file)
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -7,21 +7,17 @@
 #ifndef __CONFIG_SOCFPGA_SOC64_COMMON_H__
 #define __CONFIG_SOCFPGA_SOC64_COMMON_H__
 
-#include <asm/arch/base_addr_s10.h>
-#include <asm/arch/handoff_s10.h>
+#include <asm/arch/base_addr_soc64.h>
+#include <asm/arch/handoff_soc64.h>
 #include <linux/stringify.h>
 
 /*
  * U-Boot general configurations
  */
 #define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_TEXT_BASE
-#define CONFIG_LOADADDR                        0x2000000
-#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
 #define CONFIG_REMAKE_ELF
 /* sysmgr.boot_scratch_cold4 & 5 (64bit) will be used for PSCI_CPU_ON call */
 #define CPU_RELEASE_ADDR               0xFFD12210
-#define CONFIG_SYS_CACHELINE_SIZE      64
-#define CONFIG_SYS_MEM_RESERVE_SECURE  0       /* using OCRAM, not DDR */
 
 /*
  * U-Boot console configurations
@@ -43,13 +39,12 @@
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR  \
                                        + CONFIG_SYS_INIT_RAM_SIZE \
-                                       - S10_HANDOFF_SIZE)
+                                       - SOC64_HANDOFF_SIZE)
 #else
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_TEXT_BASE \
                                        + 0x100000)
 #endif
 #define CONFIG_SYS_INIT_SP_OFFSET      (CONFIG_SYS_INIT_SP_ADDR)
-#define CONFIG_SYS_MALLOC_LEN          (5 * 1024 * 1024)
 
 /*
  * U-Boot environment configurations
@@ -64,10 +59,7 @@
 
 /* Flash device info */
 
-/*#define CONFIG_ENV_IS_IN_SPI_FLASH*/
-
 #ifndef CONFIG_SPL_BUILD
-#define CONFIG_MTD_PARTITIONS
 #define MTDIDS_DEFAULT                 "nor0=ff705000.spi.0"
 #endif /* CONFIG_SPL_BUILD */
 
@@ -118,11 +110,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
        "socfpga_legacy_reset_compat=1\0"
 
 /*
- * Generic Interrupt Controller Definitions
- */
-#define CONFIG_GICV2
-
-/*
  * External memory configurations
  */
 #define PHYS_SDRAM_1                   0x0
@@ -149,7 +136,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 /*
  * Flash configurations
  */
-#define CONFIG_SYS_MAX_FLASH_BANKS     1
 
 /* Ethernet on SoC (EMAC) */
 #if defined(CONFIG_CMD_NET)
@@ -160,7 +146,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
  * L4 Watchdog
  */
 #ifndef CONFIG_SPL_BUILD
-#undef CONFIG_HW_WATCHDOG
 #undef CONFIG_DESIGNWARE_WATCHDOG
 #endif
 #define CONFIG_DW_WDT_BASE             SOCFPGA_L4WD0_ADDRESS