#ifndef __CONFIG_SOCFPGA_SOC64_COMMON_H__
#define __CONFIG_SOCFPGA_SOC64_COMMON_H__
-#include <asm/arch/base_addr_s10.h>
+#include <asm/arch/base_addr_soc64.h>
#include <asm/arch/handoff_soc64.h>
#include <linux/stringify.h>
/*
* U-Boot general configurations
*/
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_LOADADDR 0x2000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_REMAKE_ELF
/* sysmgr.boot_scratch_cold4 & 5 (64bit) will be used for PSCI_CPU_ON call */
#define CPU_RELEASE_ADDR 0xFFD12210
-#define CONFIG_SYS_CACHELINE_SIZE 64
/*
* U-Boot console configurations
*/
-#define CONFIG_SYS_MAXARGS 64
-#define CONFIG_SYS_CBSIZE 2048
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Extend size of kernel image for uncompression */
-#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024)
/*
* U-Boot run time memory configurations
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000
#define CONFIG_SYS_INIT_RAM_SIZE 0x40000
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR \
- + CONFIG_SYS_INIT_RAM_SIZE \
- - SOC64_HANDOFF_SIZE)
-#else
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE \
- + 0x100000)
-#endif
-#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_SP_ADDR)
-#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024)
/*
* U-Boot environment configurations
*/
/*
- * QSPI support
- */
- #ifdef CONFIG_CADENCE_QSPI
-/* Enable it if you want to use dual-stacked mode */
-/*#define CONFIG_QSPI_RBF_ADDR 0x720000*/
-
-/* Flash device info */
-
-/*#define CONFIG_ENV_IS_IN_SPI_FLASH*/
-
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_MTD_PARTITIONS
-#define MTDIDS_DEFAULT "nor0=ff705000.spi.0"
-#endif /* CONFIG_SPL_BUILD */
-
-#ifndef __ASSEMBLY__
-unsigned int cm_get_qspi_controller_clk_hz(void);
-#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz()
-#endif
-
-#endif /* CONFIG_CADENCE_QSPI */
-
-/*
* Environment variable
*/
-
-#ifdef CONFIG_FIT
-#define CONFIG_BOOTFILE "kernel.itb"
-#else
-#define CONFIG_BOOTFILE "Image"
-#endif
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"bootfile=" CONFIG_BOOTFILE "\0" \
"socfpga_legacy_reset_compat=1\0"
/*
- * Generic Interrupt Controller Definitions
- */
-#define CONFIG_GICV2
-
-/*
* External memory configurations
*/
#define PHYS_SDRAM_1 0x0
#define CONFIG_SYS_NS16550_MEM32
/*
- * Timer & watchdog configurations
- */
-#define COUNTER_FREQUENCY 400000000
-
-/*
* SDMMC configurations
*/
#ifdef CONFIG_CMD_MMC
/*
* Flash configurations
*/
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-
-/* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_DW_ALTDESCRIPTOR
-#endif /* CONFIG_CMD_NET */
/*
* L4 Watchdog
*/
-#ifndef CONFIG_SPL_BUILD
-#undef CONFIG_HW_WATCHDOG
-#undef CONFIG_DESIGNWARE_WATCHDOG
-#endif
-#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
#ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
#ifndef __ASSEMBLY__
unsigned int cm_get_l4_sys_free_clk_hz(void);
* 0x8000_0000 ...... End of SDRAM_1 (assume 2GB)
*
*/
-#define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex"
-#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE
-#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
-#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
-#define CONFIG_SPL_BSS_START_ADDR (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE \
- - CONFIG_SPL_BSS_MAX_SIZE)
-#define CONFIG_SYS_SPL_MALLOC_SIZE (CONFIG_SYS_MALLOC_LEN)
-#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR \
- - CONFIG_SYS_SPL_MALLOC_SIZE)
-
-/* SPL SDMMC boot support */
-#ifdef CONFIG_SPL_LOAD_FIT
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb"
-#else
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#endif
#endif /* __CONFIG_SOCFPGA_SOC64_COMMON_H__ */