+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
#define __CONFIG_SOCFPGA_CYCLONE5_H__
#include <asm/arch/base_addr_ac5.h>
-/* U-Boot Commands */
-#define CONFIG_FAT_WRITE
-#define CONFIG_HW_WATCHDOG
-
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-#endif
-
-#define CONFIG_ENV_IS_IN_MMC
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>