Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'

[platform/kernel/u-boot.git] / include / configs / socfpga_cyclone5.h

diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index 346ca72..262e744 100644 (file)
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -8,6 +8,8 @@
 
 #include <asm/arch/socfpga_base_addrs.h>
 #include "../../board/altera/socfpga/pinmux_config.h"
+#include "../../board/altera/socfpga/iocsr_config.h"
+#include "../../board/altera/socfpga/pll_config.h"
 
 /*
  * High level configuration
@@ -16,7 +18,6 @@
 #define CONFIG_SOCFPGA_VIRTUAL_TARGET
 
 #define CONFIG_ARMV7
-#define CONFIG_L2_OFF
 #define CONFIG_SYS_DCACHE_OFF
 #undef CONFIG_USE_IRQ
 
@@ -196,16 +197,28 @@
 /* reload value when timer count to zero */
 #define TIMER_LOAD_VAL                 0xFFFFFFFF
 /* Timer info */
-#define CONFIG_SYS_HZ                  1000
 #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
-#define CONFIG_TIMER_CLOCK_KHZ         2400
+#define CONFIG_SYS_TIMER_RATE          2400000
 #else
-#define CONFIG_TIMER_CLOCK_KHZ         25000
+#define CONFIG_SYS_TIMER_RATE          25000000
 #endif
+#define CONFIG_SYS_TIMER_COUNTS_DOWN
+#define CONFIG_SYS_TIMER_COUNTER       (CONFIG_SYS_TIMERBASE + 0x4)
 
 #define CONFIG_ENV_IS_NOWHERE
 
 /*
+ * L4 Watchdog
+ */
+#define CONFIG_HW_WATCHDOG
+#define CONFIG_HW_WATCHDOG_TIMEOUT_MS  2000
+#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_DW_WDT_BASE             SOCFPGA_L4WD0_ADDRESS
+/* Clocks source frequency to watchdog timer */
+#define CONFIG_DW_WDT_CLOCK_KHZ                25000
+
+
+/*
  * SPL "Second Program Loader" aka Initial Software
  */
 
@@ -237,4 +250,7 @@
 /* Support for lib/libgeneric.o in SPL binary */
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 
+/* Support for watchdog */
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+
 #endif /* __CONFIG_H */