arm: socfpga: Enabling U-Boot environment support in QSPI

[platform/kernel/u-boot.git] / include / configs / socfpga_common.h

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 35e4a75..7b5fe60 100644 (file)
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -24,12 +24,13 @@
 
 #define CONFIG_CRC32_VERIFY
 
-#define CONFIG_FIT
-#define CONFIG_OF_LIBFDT
 #define CONFIG_SYS_BOOTMAPSZ           (64 * 1024 * 1024)
 
 #define CONFIG_TIMESTAMP               /* Print image info with timestamp */
 
+/* add target to build it automatically upon "make" */
+#define CONFIG_BUILD_TARGET            "u-boot-with-spl.sfp"
+
 /*
  * Memory configurations
  */
@@ -161,6 +162,19 @@
 #endif
 
 /*
+ * NAND Support
+ */
+#ifdef CONFIG_NAND_DENALI
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#define CONFIG_SYS_NAND_MAX_CHIPS      1
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_NAND_DENALI_ECC_SIZE    512
+#define CONFIG_SYS_NAND_REGS_BASE      SOCFPGA_NANDREGS_ADDRESS
+#define CONFIG_SYS_NAND_DATA_BASE      SOCFPGA_NANDDATA_ADDRESS
+#define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_NAND_DATA_BASE + 0x10)
+#endif
+
+/*
  * I2C support
  */
 #define CONFIG_SYS_I2C
@@ -248,7 +262,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 
 #define CONFIG_USB_FUNCTION_DFU
+#ifdef CONFIG_DM_MMC
 #define CONFIG_DFU_MMC
+#endif
 #define CONFIG_SYS_DFU_DATA_BUF_SIZE   (32 * 1024 * 1024)
 #define DFU_DEFAULT_POLL_TIMEOUT       300
 
@@ -276,6 +292,12 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_ENV_OFFSET              512     /* just after the MBR */
 #endif
 
+/* Environment for QSPI boot */
+#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_OFFSET              0x00100000
+#define CONFIG_ENV_SECT_SIZE           (64 * 1024)
+#endif
+
 /*
  * mtd partitioning for serial NOR flash
  *
@@ -330,8 +352,15 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_WATCHDOG_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
+#ifdef CONFIG_DM_MMC
 #define CONFIG_SPL_MMC_SUPPORT
+#endif
+#ifdef CONFIG_DM_SPI
 #define CONFIG_SPL_SPI_SUPPORT
+#endif
+#ifdef CONFIG_SPL_NAND_DENALI
+#define CONFIG_SPL_NAND_SUPPORT
+#endif
 
 /* SPL SDMMC boot support */
 #ifdef CONFIG_SPL_MMC_SUPPORT
@@ -348,12 +377,18 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 
 /* SPL QSPI boot support */
 #ifdef CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_DM_SEQ_ALIAS            1
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x40000
 #endif
 
+/* SPL NAND boot support */
+#ifdef CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
+#define CONFIG_SYS_NAND_U_BOOT_OFFS    0x40000
+#endif
+
 /*
  * Stack setup
  */