imx6/imx7: Remove now empty imx6_spl.h and imx7_spl.h

[platform/kernel/u-boot.git] / include / configs / smartweb.h

diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 1a3ac81..7c8f167 100644 (file)
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -30,7 +30,7 @@
 #include <linux/sizes.h>
 
 /*
- * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
+ * Warning: changing CONFIG_TEXT_BASE requires adapting the initial boot
  * program. Since the linker has to swallow that define, we must use a pure
  * hex number here!
  */
@@ -54,13 +54,11 @@
  */
 
 /* NAND flash settings */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
-#define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
-#define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC14
-#define CONFIG_SYS_NAND_READY_PIN      AT91_PIN_PC13
+#define CFG_SYS_NAND_BASE              ATMEL_BASE_CS3
+#define CFG_SYS_NAND_MASK_ALE  (1 << 21)
+#define CFG_SYS_NAND_MASK_CLE  (1 << 22)
+#define CFG_SYS_NAND_ENABLE_PIN        AT91_PIN_PC14
+#define CFG_SYS_NAND_READY_PIN AT91_PIN_PC13
 
 /* serial console */
 #define CONFIG_USART_BASE              ATMEL_BASE_DBGU
@@ -94,15 +92,13 @@
 
 /* Defines for SPL */
 
-#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
-#define CONFIG_SYS_NAND_U_BOOT_SIZE    SZ_512K
-#define        CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_SYS_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_SIZE       SZ_512K
+#define        CFG_SYS_NAND_U_BOOT_START       CONFIG_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_DST        CONFIG_TEXT_BASE
 
-#define CONFIG_SYS_NAND_SIZE           (SZ_256M)
-#define CONFIG_SYS_NAND_ECCSIZE                256
-#define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_SYS_NAND_ECCPOS         { 40, 41, 42, 43, 44, 45, 46, 47, \
+#define CFG_SYS_NAND_ECCSIZE           256
+#define CFG_SYS_NAND_ECCBYTES  3
+#define CFG_SYS_NAND_ECCPOS            { 40, 41, 42, 43, 44, 45, 46, 47, \
                                          48, 49, 50, 51, 52, 53, 54, 55, \
                                          56, 57, 58, 59, 60, 61, 62, 63, }