/* commands to include */
-#ifndef CONFIG_SPL_BUILD
#define CONFIG_ROOTPATH "/opt/eldk"
-#endif
-
-#define CONFIG_SYS_AUTOLOAD "yes"
/* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */
/* Physical Memory Map */
#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
-#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
+#define CFG_SYS_SDRAM_BASE PHYS_DRAM_1
/* Platform/Board specific defs */
-#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
+#define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
/* NS16550 Configuration */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_CLK (48000000)
-#define CONFIG_SYS_NS16550_COM1 0x44e09000
-#define CONFIG_SYS_NS16550_COM4 0x481a6000
+#define CFG_SYS_NS16550_CLK (48000000)
+#define CFG_SYS_NS16550_COM1 0x44e09000
+#define CFG_SYS_NS16550_COM4 0x481a6000
/* I2C Configuration */
/* Defines for SPL */
-#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
+#define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, \
18, 19, 20, 21, 22, 23, 24, 25, \
26, 27, 28, 29, 30, 31, 32, 33, \
42, 43, 44, 45, 46, 47, 48, 49, \
50, 51, 52, 53, 54, 55, 56, 57, }
-#define CONFIG_SYS_NAND_ECCSIZE 512
-#define CONFIG_SYS_NAND_ECCBYTES 14
-
-#define CONFIG_SYS_NAND_ECCSTEPS 4
-#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
- CONFIG_SYS_NAND_ECCSTEPS)
+#define CFG_SYS_NAND_ECCSIZE 512
+#define CFG_SYS_NAND_ECCBYTES 14
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
/*
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
* we don't need to do it twice.
*/
-#ifndef CONFIG_SPL_BUILD
-
/* USB DRACO ID as default */
#define CONFIG_USBD_HS
/* USB Device Firmware Update support */
#define DFU_MANIFEST_POLL_TIMEOUT 25000
-#endif /* CONFIG_SPL_BUILD */
-
/*
* Default to using SPI for environment, etc. We have multiple copies
* of SPL as the ROM will check these locations.
"nand_active_ubi_vol=rootfs_a\0" \
"nand_active_ubi_vol_A=rootfs_a\0" \
"nand_active_ubi_vol_B=rootfs_b\0" \
- "nand_root_fs_type=ubifs rootwait=1\0" \
+ "nand_root_fs_type=ubifs rootwait\0" \
"nand_src_addr=0x280000\0" \
"nand_src_addr_A=0x280000\0" \
"nand_src_addr_B=0x780000\0" \
"nand_active_ubi_vol=rootfs_a\0" \
"rootfs_name=rootfs\0" \
"kernel_name=uImage\0"\
- "nand_root_fs_type=ubifs rootwait=1\0" \
+ "nand_root_fs_type=ubifs rootwait\0" \
"nand_args=run bootargs_defaults;" \
"mtdparts default;" \
"setenv ${partitionset_active} true;" \
*/
-#define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */
+#define CFG_SYS_NAND_BASE (0x08000000) /* physical address */
/* to access nand at */
/* CS0 */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND
- devices */
-#if !defined(CONFIG_SPI_BOOT)
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
-#endif
#endif
#endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */