+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuation settings for the Renesas SH7763RDP board
*
* Copyright (C) 2008 Renesas Solutions Corp.
* Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __SH7763RDP_H
#define __SH7763RDP_H
#define CONFIG_CPU_SH7763 1
-#define CONFIG_SH7763RDP 1
#define __LITTLE_ENDIAN 1
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_JFFS2
-
-#define CONFIG_BOOTDELAY -1
-#define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01"
#define CONFIG_ENV_OVERWRITE 1
-#define CONFIG_VERSION_VARIABLE
+#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS
/* SCIF */
-#define CONFIG_SCIF_CONSOLE 1
-#define CONFIG_BAUDRATE 115200
#define CONFIG_CONS_SCIF2 1
-#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
-#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
-#define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments
- passed to kernel */
#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
settings for this board */
/* Use hardware flash sectors protection instead of U-Boot software protection */
#undef CONFIG_SYS_FLASH_PROTECTION
#undef CONFIG_SYS_DIRECT_FLASH_TFTP
-#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SECT_SIZE (128 * 1024)
#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
/* Clock */
#define CONFIG_SYS_CLK_FREQ 66666666
-#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
/* Ether */
-#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (1)
#define CONFIG_SH_ETHER_PHY_ADDR (0x01)
-#define CONFIG_PHYLIB
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII