+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Configuation settings for the sh7757lcr board
*
* Copyright (C) 2011 Renesas Solutions Corp.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __SH7757LCR_H
#define CONFIG_SH7757LCR_DDR_ECC 1
#define CONFIG_DISPLAY_BOARDINFO
-#undef CONFIG_SHOW_BOOT_PROGRESS
/* MEMORY */
#define SH7757LCR_SDRAM_BASE (0x80000000)
#define CONFIG_SH_ETHER_USE_PORT 0
#define CONFIG_SH_ETHER_PHY_ADDR 1
#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
-#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
#define CONFIG_SH_SPI_BASE 0xfe002000
/* MMCIF */
-#define CONFIG_SH_MMCIF 1
#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
#define CONFIG_SH_MMCIF_CLK 48000000
#define SH7757LCR_PCIEBRG_SIZE (96 * 1024)
/* ENV setting */
-#define CONFIG_ENV_IS_EMBEDDED
-#define CONFIG_ENV_SECT_SIZE (64 * 1024)
-#define CONFIG_ENV_ADDR (0x00080000)
-#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
#define CONFIG_ENV_OVERWRITE 1
-#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
#define CONFIG_EXTRA_ENV_SETTINGS \
"netboot=bootp; bootm\0"
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 48000000
-#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_TMU_CLK_DIV 4
#endif /* __SH7757LCR_H */